Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO2018219101) BACK METAL CAPACITOR STRUCTURE OF COMPOUND SEMICONDUCTOR AND MANUFACTURING METHOD THEREFOR
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/219101 International Application No.: PCT/CN2018/086007
Publication Date: 06.12.2018 International Filing Date: 08.05.2018
IPC:
H01L 27/04 (2006.01) ,H01L 21/8252 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
8252
the substrate being a semiconductor, using III-V technology
Applicants:
厦门市三安集成电路有限公司 SANAN INTEGRATED CIRCUIT MANUFACTURING CORPORATION, LTD. [CN/CN]; 中国福建省厦门市 同安区洪塘镇民安大道753-799号 No. 753-799 Min'an Avenue Hongtang Town, Tong'an District Xiamen, Fujian 361100, CN
Inventors:
王勇 WANG, Yong; CN
Priority Data:
201710390074.427.05.2017CN
Title (EN) BACK METAL CAPACITOR STRUCTURE OF COMPOUND SEMICONDUCTOR AND MANUFACTURING METHOD THEREFOR
(FR) STRUCTURE DE CONDENSATEUR MÉTALLIQUE ARRIÈRE DE SEMI-CONDUCTEUR COMPOSÉ ET SON PROCÉDÉ DE FABRICATION
(ZH) 一种化合物半导体背金电容的结构及其制作方法
Abstract:
(EN) A back metal capacitor structure of a compound semiconductor and a manufacturing method therefor. The MIM capacitor is manufactured in a heat dissipation connecting port, penetrating through the front and back surfaces, of a substrate. A first electrode plate, a dielectric layer and a second electrode plate are laminated in sequence, and respectively extend along the inner wall of the heat dissipation connecting port, so as to cover the bottom surface and side surface of the heat dissipation connecting port and extend to cover the back surface of the substrate around the heat dissipation connecting port. The first electrode plate is in physical contact with a metal wiring layer on the bottom surface of the heat dissipation connecting port, and the second electrode is connected to the ground. The present invention fuses an MIM capacitor into an inherent structure of wafer, significantly reducing the area occupied by the MIM capacitor in an integrated circuit while increasing capacitance, thereby achieving miniaturization of the device; and heat dissipation is achieved by means of a special MIM structure, without additionally providing a heat dissipation column, simplifying the structure.
(FR) La présente invention concerne une structure de condensateur métallique arrière d'un semi-conducteur composé et son procédé de fabrication. Le condensateur MIM est fabriqué dans un orifice de connexion de dissipation de chaleur, pénétrant à travers les surfaces avant et arrière d'un substrat. Une première plaque d'électrode, une couche diélectrique et une seconde plaque d'électrode sont stratifiées en séquence, et s'étendent respectivement le long de la paroi interne de l'orifice de connexion de dissipation de chaleur, de manière à recouvrir la surface inférieure et la surface latérale de l'orifice de connexion de dissipation de chaleur et s'étendre pour recouvrir la surface arrière du substrat autour de l'orifice de connexion de dissipation de chaleur. La première plaque d'électrode est en contact physique avec une couche de câblage métallique sur la surface inférieure de l'orifice de connexion de dissipation de chaleur, et la seconde électrode est connectée à la masse. La présente invention fusionne un condensateur MIM en une structure inhérente de tranche, réduisant significativement la surface occupée par le condensateur MIM dans un circuit intégré tout en augmentant la capacité, ce qui permet d'obtenir une miniaturisation du dispositif; et la dissipation de chaleur est obtenue au moyen d'une structure MIM spéciale, sans ajouter de colonne de dissipation de chaleur, simplifiant la structure.
(ZH) 本发明公开了一种化合物半导体背金电容的结构及其制作方法,将MIM电容制作于基底贯穿正面和背面的散热连接口之内,第一电极板、介质层和第二电极板依次层叠且分别沿所述散热连接口内壁延伸以覆盖所述散热连接口的底面和侧面并延伸至覆盖所述散热连接口周边所述基底的背面,其中第一电极板于所述散热连接口底面与所述金属连线层物理接触,第二电极板接地。本发明将MIM电容融合于晶片固有的结构中,在增大电容量的同时显著的减小了其在集成电路中所占的面积,实现了器件小型化;并借由特殊的MIM结构实现了散热,无需另外设置散热柱,简化了结构。
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)