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1. (WO2018204487) HIGH SPEED SEMICONDUCTOR CHIP STACK

Pub. No.:    WO/2018/204487    International Application No.:    PCT/US2018/030634
Publication Date: Fri Nov 09 00:59:59 CET 2018 International Filing Date: Thu May 03 01:59:59 CEST 2018
IPC: H01G 4/12
H01G 4/005
H01G 4/248
H01G 4/30
Applicants: DE ROCHEMONT, L. Pierre
Inventors: DE ROCHEMONT, L. Pierre
Title: HIGH SPEED SEMICONDUCTOR CHIP STACK
Abstract:
The present invention ultra-low loss high energy density dielectric layers having femtosecond (10-15 sec) polarization response times within a chip stack assembly to extend impedance-matched electrical lengths and mitigate ringing within the chip stack to bring the operational clock speed of the stacked system closer to the intrinsic clock speed(s) of the semiconductor die bonded within chip stack.