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1. (WO2018201249) APPARATUS AND METHOD FOR CONTROLLING DATA ACCELERATION

Pub. No.:    WO/2018/201249    International Application No.:    PCT/CA2018/050520
Publication Date: Fri Nov 09 00:59:59 CET 2018 International Filing Date: Thu May 03 01:59:59 CEST 2018
IPC: G06F 15/00
G06F 13/00
G06F 9/06
Applicants: EIDETIC COMMUNICATIONS INC.
Inventors: GIBB, Sean
BERTSCHMANN, Roger
Title: APPARATUS AND METHOD FOR CONTROLLING DATA ACCELERATION
Abstract:
Systems and methods are provided that facilitate performing hardware acceleration processes without utilizing specialized drivers that are software and hardware specific by controlling the hardware accelerator with NVMe commands. The NVMe commands may be based on standardized NVMe commands provided in the NVMe specification, or may be vendor-specific commands that are supported by the NVMe specification. The commands are sent to the NVMe accelerator by a host CPU which, in some embodiments, may be located remotely to the NVMe accelerator. The NVMe accelerator may include a CMB on which a host CPU may set up an NVMe queue in order to reduce PCIe traffic on a PCIe bus connecting the CPU and the NVMe accelerator. The CMB may also be used by a host CPU to transfer data for acceleration to reduce bandwidth in the DMA controller or to remove host staging buffers and memory copies.