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1. (WO2018198979) ELECTRODE-ATTACHED SUBSTRATE, LAMINATED SUBSTRATE, AND ORGANIC DEVICE MANUFACTURING METHOD
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/198979 International Application No.: PCT/JP2018/016323
Publication Date: 01.11.2018 International Filing Date: 20.04.2018
IPC:
H05B 33/02 (2006.01) ,H01L 21/3205 (2006.01) ,H01L 21/768 (2006.01) ,H01L 23/522 (2006.01) ,H01L 51/05 (2006.01) ,H01L 51/40 (2006.01) ,H01L 51/50 (2006.01) ,H05B 33/10 (2006.01) ,H05B 33/26 (2006.01) ,H05F 3/02 (2006.01)
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
B
ELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
33
Electroluminescent light sources
02
Details
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
3205
Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layers; After-treatment of these layers
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71
Manufacture of specific parts of devices defined in group H01L21/7086
768
Applying interconnections to be used for carrying current between separate components within a device
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
52
Arrangements for conducting electric current within the device in operation from one component to another
522
including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
51
Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof
05
specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
51
Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof
05
specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier
40
Processes or apparatus specially adapted for the manufacture or treatment of such devices or of parts thereof
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
51
Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof
50
specially adapted for light emission, e.g. organic light emitting diodes (OLED) or polymer light emitting devices (PLED)
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
B
ELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
33
Electroluminescent light sources
10
Apparatus or processes specially adapted to the manufacture of electroluminescent light sources
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
B
ELECTRIC HEATING; ELECTRIC LIGHTING NOT OTHERWISE PROVIDED FOR
33
Electroluminescent light sources
12
Light sources with substantially two-dimensional radiating surfaces
26
characterised by the composition or arrangement of the conductive material used as an electrode
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
F
STATIC ELECTRICITY; NATURALLY-OCCURRING ELECTRICITY
3
Carrying-off electrostatic charges
02
by means of earthing connections
Applicants:
住友化学株式会社 SUMITOMO CHEMICAL COMPANY, LIMITED [JP/JP]; 東京都中央区新川二丁目27番1号 27-1, Shinkawa 2-chome, Chuo-ku, Tokyo 1048260, JP
Inventors:
森島 進一 MORISHIMA Shinichi; JP
下河原 匡哉 SHIMOGAWARA Masaya; JP
岸川 英司 KISHIKAWA Eiji; JP
Agent:
長谷川 芳樹 HASEGAWA Yoshiki; JP
清水 義憲 SHIMIZU Yoshinori; JP
三上 敬史 MIKAMI Takafumi; JP
Priority Data:
2017-08739226.04.2017JP
Title (EN) ELECTRODE-ATTACHED SUBSTRATE, LAMINATED SUBSTRATE, AND ORGANIC DEVICE MANUFACTURING METHOD
(FR) SUBSTRAT FIXÉ À UNE ÉLECTRODE, SUBSTRAT STRATIFIÉ ET PROCÉDÉ DE FABRICATION DE DISPOSITIF ORGANIQUE
(JA) 電極付き基板、積層基板及び有機デバイスの製造方法
Abstract:
(EN) An electrode-attached substrate according to an embodiment is an electrode-attached substrate 32 for manufacturing an organic device 10 comprising a first electrode 14, an organic function layer 16, and a second electrode 18, and is provided with: a support substrate 34; the first electrode disposed inside a device forming region DA on a surface 34a of the support substrate 34; and a charging-preventing conductive portion 36 which is disposed on the surface and electrically connected with the first electrode.
(FR) L'invention concerne un substrat fixé à une électrode qui, selon un mode de réalisation, est un substrat fixé à une électrode 32 pour fabriquer un dispositif organique 10 comprenant une première électrode 14, une couche fonctionnelle organique 16 et une seconde électrode 18, et qui comprend : un substrat de support 34 ; la première électrode disposée à l'intérieur d'une région de formation de dispositif DA sur une surface 34a du substrat de support 34 ; et une partie conductrice 36 de prévention de charge qui est disposée sur la surface et connectée électriquement à la première électrode.
(JA) 一形態に係る電極付き基板は、第1の電極14、有機機能層16及び第2の電極18を含む有機デバイス10を製造するための電極付き基板32であり、支持基板34と、支持基板34の表面34a上においてデバイス形成領域DAの内側に設けられる第1の電極と、上記表面上に設けられており、第1の電極と電気的に接続される帯電防止用導電部36と、を備える。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)