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1. (WO2018196630) SENSOR PACKAGE STRUCTURE MANUFACTURING METHOD AND SENSOR PACKAGE STRUCTURE
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Pub. No.: WO/2018/196630 International Application No.: PCT/CN2018/082936
Publication Date: 01.11.2018 International Filing Date: 13.04.2018
IPC:
H01L 21/56 (2006.01) ,H01L 21/60 (2006.01) ,H01L 23/31 (2006.01) ,H01L 23/488 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
56
Encapsulations, e.g. encapsulating layers, coatings
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
60
Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
28
Encapsulation, e.g. encapsulating layers, coatings
31
characterised by the arrangement
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
48
Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
488
consisting of soldered or bonded constructions
Applicants:
苏州迈瑞微电子有限公司 MICROARRAY MICROELECTRONICS CORP., LTD [CN/CN]; 中国江苏省苏州市 工业园区新平街388号22幢11层01&02&03&12 388 Xinping Street, Building 22, Ground 11 Apt 01 & 02 & 03 & 12, Industrial Park Suzhou, Jiangsu 215000, CN
Inventors:
李扬渊 LI, Yangyuan; CN
Agent:
苏州威世朋知识产权代理事务所(普通合伙) SUZHOU WISPRO INTELLECTUAL PROPERTY AGENCY; 中国江苏省苏州市 工业园区星湖街999号99幢506室谢丽君 Anne Xie, Apt 506, Building 99 999 Xinghu Street, Suzhou Industrial Park Suzhou, Jiangsu 215028, CN
Priority Data:
201710293294.528.04.2017CN
Title (EN) SENSOR PACKAGE STRUCTURE MANUFACTURING METHOD AND SENSOR PACKAGE STRUCTURE
(FR) PROCÉDÉ DE FABRICATION DE STRUCTURE DE GROUPE DE CAPTEURS ET STRUCTURE DE GROUPE DE CAPTEURS
(ZH) 传感器封装结构的制备方法和传感器封装结构
Abstract:
(EN) A sensor package structure manufacturing method and a sensor package structure. The sensor package structure manufacturing method comprises: providing a chip (1), a functional circuit being formed on a first surface (111) of the chip (11); forming balls (113) on a second surface (112) of the chip (11) opposite to the first surface (111), the balls (113) being electrically connected to the functional circuit; attaching the first surface (111) of the chip (11) to a first surface (121) of a protection portion (12); forming a packaging layer (14) above the first surface (121) of the protection portion (12), the packaging layer (14) covers the chip (11); thinning the packaging layer (14) distant from the first surface (121) of the protection portion and the balls (113) to form pads (15), the formed pads (15) being partial regions that expose the balls (113). The technical solution can reduce the process difficulty, resolve the problem of scrapping of a sensor package structure due to the flash generated by the open molding, and improve the yield of sensor packages.
(FR) L’invention concerne un procédé de fabrication de structure de groupe de capteurs et une structure de groupe de capteurs. Le procédé de fabrication de structure de groupe de capteurs consiste : à réaliser une puce (1), un circuit fonctionnel étant formé sur une première surface (111) de la puce (11) ; à former des billes (113) sur une deuxième surface (112) de la puce (11) opposée à la première surface (111), les billes (113) étant connectées électriquement au circuit fonctionnel ; à fixer la première surface (111) de la puce (11) à une première surface (121) d’une partie de protection (12) ; à former une couche de conditionnement (14) au-dessus de la première surface (121) de la partie de protection (12), la couche de conditionnement (14) recouvrant la puce (11) ; à amincir la couche de conditionnement (14) distante de la première surface (121) de la partie de protection et les billes (113) pour former des pastilles (15), les pastilles (15) formées étant des zones partielles qui découvrent les billes (113). La solution technique peut réduire la difficulté du processus, résoudre le problème de raclage d’une structure de groupe de capteurs en raison de l’éclair généré par le moulage ouvert, et améliorer le rendement de groupes de capteurs.
(ZH) 一种传感器封装结构的制备方法和传感器封装结构,其中,传感器封装结构的制备方法包括:提供芯片(11),芯片(11)的第一表面(111)形成有功能电路;在芯片(11)与第一表面(111)相对的第二表面(112)上形成植球(113),植球(113)与功能电路电连接;将芯片(11)的第一表面(111)和保护部(12)的第一表面(121)贴合;在保护部(12)的第一表面(121)上方形成封装层(14),封装层(14)包覆芯片(11);对远离保护部第一表面(121)的封装层(14)和植球(113)进行减薄形成焊盘(15),形成的焊盘(15)为暴露出的植球(113)的部分区域。本技术方案可以降低工艺难度,解决因敞开式模塑法产生的溢料造成传感器封装结构报废的问题,提高传感器封装良率。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)