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1. (WO2018196111) LTPS ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR

Pub. No.:    WO/2018/196111    International Application No.:    PCT/CN2017/087784
Publication Date: Fri Nov 02 00:59:59 CET 2018 International Filing Date: Sat Jun 10 01:59:59 CEST 2017
IPC: G02F 1/1333
G02F 1/1343
H01L 27/12
Applicants: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD
武汉华星光电技术有限公司
Inventors: YANG, Chengao
杨成奥
Title: LTPS ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREFOR
Abstract:
Provided is a low temperature polycrystalline silicon (LTPS) array substrate. The array substrate comprises a substrate (101), an insulated gate layer (102), an interlayer insulating layer (103), an organic film layer (104), and a pressure sensing plate (105) that are stacked; the pressure sensing plate (105) is formed in the organic film layer (104); a metallic layer is further comprised and formed on the organic film layer (104); the metallic layer is subjected to patterning processing to form a common electrode (106) and a pressure sensing line (107) that are insulated from each other; the pressure sensing line (107) is connected to the pressure sensing plate (105).