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1. (WO2018186248) METHOD FOR MANUFACTURING EPITAXIAL SILICON WAFER AND EPITAXIAL SILICON WAFER
Latest bibliographic data on file with the International BureauSubmit observation

Pub. No.: WO/2018/186248 International Application No.: PCT/JP2018/012640
Publication Date: 11.10.2018 International Filing Date: 28.03.2018
IPC:
C30B 29/06 (2006.01) ,C23C 16/02 (2006.01) ,C23C 16/24 (2006.01) ,C30B 25/20 (2006.01) ,H01L 21/20 (2006.01) ,H01L 21/205 (2006.01)
C CHEMISTRY; METALLURGY
30
CRYSTAL GROWTH
B
SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
29
Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
02
Elements
06
Silicon
C CHEMISTRY; METALLURGY
23
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
C
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
16
Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes
02
Pretreatment of the material to be coated
C CHEMISTRY; METALLURGY
23
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
C
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
16
Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes
22
characterised by the deposition of inorganic material, other than metallic material
24
Deposition of silicon only
C CHEMISTRY; METALLURGY
30
CRYSTAL GROWTH
B
SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
25
Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour deposition growth
02
Epitaxial-layer growth
18
characterised by the substrate
20
the substrate being of the same materials as the epitaxial layer
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
20
Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
20
Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
205
using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
Applicants:
株式会社SUMCO SUMCO CORPORATION [JP/JP]; 東京都港区芝浦一丁目2番1号 1-2-1, Shibaura, Minato-ku, Tokyo 1058634, JP
Inventors:
野中 直哉 NONAKA Naoya; JP
川島 正 KAWASHIMA Tadashi; JP
溝上 憲一 MIZOGAMI Kenichi; JP
Agent:
特許業務法人樹之下知的財産事務所 KINOSHITA & ASSOCIATES; 東京都杉並区荻窪五丁目26番13号 3階 3rd Floor, 26-13, Ogikubo 5-chome, Suginami-ku, Tokyo 1670051, JP
Priority Data:
2017-07603406.04.2017JP
Title (EN) METHOD FOR MANUFACTURING EPITAXIAL SILICON WAFER AND EPITAXIAL SILICON WAFER
(FR) PROCÉDÉ DE FABRICATION D'UNE TRANCHE DE SILICIUM ÉPITAXIALE, ET TRANCHE DE SILICIUM ÉPITAXIALE
(JA) エピタキシャルシリコンウェーハの製造方法およびエピタキシャルシリコンウェーハ
Abstract:
(EN) Provided is a method for manufacturing an epitaxial silicon wafer using a silicon wafer that contains phosphorous and that has a resistivity of less than 1.0 mΩ∙cm, the method comprising: an argon annealing step (S2) in which a silicon wafer is heat treated for 30 minutes or more at a temperature of 1200-1220°C in an argon gas atmosphere, the silicon wafer having a main surface which is a surface where a (100) surface is inclined, and a [100] axis that is perpendicular to the (100) surface being inclined by 0°5'-0°25' relative to an axis that intersects the main surface at a right angle; a pre-baking step (S3) in which the surface of the silicon wafer is etched; and an epitaxial film growing step (S4) in which an epitaxial film is grown on the surface of the silicon wafer at a growth temperature of 1100-1165°C.
(FR) L'invention concerne un procédé de fabrication d'une tranche de silicium épitaxiale à l'aide d'une tranche de silicium qui contient du phosphore et qui a une résistivité inférieure à 1,0 mΩ∙cm, le procédé comprenant : une étape de recuit à l'argon (S2) dans laquelle une tranche de silicium est traitée thermiquement pendant 30 minutes ou plus à une température de 1 200 à 1 220 °C dans une atmosphère d'argon gazeux, la tranche de silicium ayant une surface principale qui est une surface où une surface (100) est inclinée, et un axe [100] qui est perpendiculaire à la surface (100) est incliné de 0°5' à 0°25' par rapport à un axe qui coupe la surface principale à angle droit ; une étape de pré-cuisson (S3) dans laquelle la surface de la tranche de silicium est gravée ; et une étape de croissance de film épitaxial (S4) dans laquelle un film épitaxial est amené à croître sur la surface de la tranche de silicium à une température de croissance de 1 100 à 1 165° C.
(JA) リンを含み抵抗率が1.0mΩ・cm未満のシリコンウェーハを用いたエピタキシャルシリコンウェーハの製造方法であって、(100)面が傾斜した面を主表面とし、(100)面に垂直な[100]軸が主表面に直交する軸に対して0°5'以上0°25'以下だけ傾斜したシリコンウェーハに対し、アルゴンガス雰囲気下において1200℃以上1220℃以下の温度で30分以上の熱処理を行うアルゴンアニール工程(S2)と、シリコンウェーハの表面をエッチングするプリベーク工程(S3)と、シリコンウェーハの表面に1100℃以上1165℃以下の成長温度でエピタキシャル膜を成長させるエピタキシャル膜成長工程(S4)とを備えている。
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African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)