WIPO logo
Mobile | Deutsch | Español | Français | 日本語 | 한국어 | Português | Русский | 中文 | العربية |
PATENTSCOPE

Search International and National Patent Collections
World Intellectual Property Organization
Options
Query Language
Stem
Sort by:
List Length
Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO2018182990) SACRIFICIAL ALIGNMENT RING AND SELF-SOLDERING VIAS FOR WAFER BONDING
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/182990 International Application No.: PCT/US2018/022720
Publication Date: 04.10.2018 International Filing Date: 15.03.2018
IPC:
H01L 21/768 (2006.01) ,H01L 23/488 (2006.01) ,H01L 25/065 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71
Manufacture of specific parts of devices defined in group H01L21/7086
768
Applying interconnections to be used for carrying current between separate components within a device
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
48
Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
488
consisting of soldered or bonded constructions
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
065
the devices being of a type provided for in group H01L27/78
Applicants: SILICON STORAGE TECHNOLOGY, INC.[US/US]; 450 Holger Way San Jose, CA 95134, US
Inventors: SATO, Justin Hiroki; US
CHEN, Bomy; US
LUNDY, Walter; US
Agent: LIMBACH, Alan A.; US
Priority Data:
15/921,56314.03.2018US
62/477,96328.03.2017US
Title (EN) SACRIFICIAL ALIGNMENT RING AND SELF-SOLDERING VIAS FOR WAFER BONDING
(FR) BAGUE D'ALIGNEMENT SACRIFICIELLE ET TROUS D'INTERCONNEXION À AUTO-BRASAGE POUR LIAISON DE TRANCHE
Abstract:
(EN) A method of bonding a first substrate to a second substrate, wherein the first substrate includes first electrical contacts on a top surface of the first substrate, and wherein the second substrate includes second electrical contacts on a bottom surface of the second substrate. The method includes forming a block of polyimide on the top surface of the first substrate, wherein the block of polyimide has a rounded upper corner, and vertically moving the top surface of the first substrate and the bottom surface of the second substrate toward each other until the first electrical contacts abut the second electrical contacts, wherein during the moving, the second substrate makes contact with the rounded upper corner of the polyimide causing the first and second substrates to move laterally relative to each other.
(FR) L'invention concerne un procédé de liaison d'un premier substrat à un second substrat, le premier substrat comprenant des premiers contacts électriques sur une surface supérieure du premier substrat, et le second substrat comprenant des seconds contacts électriques sur une surface inférieure du second substrat. Le procédé consiste à former un bloc de polyimide sur la surface supérieure du premier substrat, le bloc de polyimide ayant un coin supérieur arrondi, et à déplacer verticalement la surface supérieure du premier substrat et la surface inférieure du second substrat l'une vers l'autre jusqu'à ce que les premiers contacts électriques viennent en butée contre les seconds contacts électriques; pendant le déplacement, le second substrat entrant en contact avec le coin supérieur arrondi du polyimide, amenant les premier et second substrats à se déplacer latéralement l'un par rapport à l'autre.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)