Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO2018182711) THIN FILM TRANSISTORS WITH MULTIPLE CHANNEL LAYERS
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/182711 International Application No.: PCT/US2017/025490
Publication Date: 04.10.2018 International Filing Date: 31.03.2017
IPC:
H01L 29/786 (2006.01) ,H01L 27/108 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
10
including a plurality of individual components in a repetitive configuration
105
including field-effect components
108
Dynamic random access memory structures
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95054, US
Inventors:
SHARMA, Abhishek A.; US
LE, Van H.; US
DEWEY, Gilbert; US
GHANI, Tahir; US
SHIVARAMAN, Shriram; US
KAVALIEROS, Jack T.; US
PILLARISETTY, Ravi; US
Agent:
WANG, Yuke; US
COFIELD, Michael A.; US
PARKER, Wesley E.; US
RASKIN, Vladimir; US
AUYEUNG, Al; US
STRAUSS, Ryan N.; US
MOORE, Michael S.; US
MAKI, Nathan R.; US
BLAIR, Steven R.; US
DANSKIN, Timothy A.; US
MARLINK, Jeffrey S.; US
MEININGER, Mark M.; US
LEE, Katherine D.; US
COWGER, Graciela G.; US
HALEVA, Aaron; US
Priority Data:
Title (EN) THIN FILM TRANSISTORS WITH MULTIPLE CHANNEL LAYERS
(FR) TRANSISTORS À COUCHES MINCES À MULTIPLES COUCHES DE CANAL
Abstract:
(EN) Embodiments herein describe techniques for a semiconductor device including a TFT having high mobility, while keeping the leakage low. Embodiments may include a gate electrode above a substrate, a first channel layer including a first material above the gate electrode, and a second channel layer including a second material above the first channel layer, wherein the first material may have a higher mobility than the second material, and the second material may have a lower leakage than the first material. Embodiments may further include a source electrode and a drain electrode above the second channel layer. Other embodiments may be described and/or claimed.
(FR) Des modes de réalisation de la présente invention concernent des techniques destinées à un dispositif à semi-conducteur contenant un TCM présentant une mobilité élevée, tout en maintenant la fuite faible. Des modes de réalisation de l'invention peuvent concerner une électrode de grille au-dessus d'un substrat, une première couche de canal comprenant un premier matériau au-dessus de l'électrode de grille et une seconde couche de canal comprenant un second matériau au-dessus de la première couche de canal, le premier matériau pouvant avoir une mobilité plus élevée que le second matériau, et le second matériau pouvant avoir une fuite plus faible que le premier matériau. Des modes de réalisation peuvent en outre comprendre une électrode de source et une électrode de drain au-dessus de la seconde couche de canal. D'autres modes de réalisation peuvent être décrits et/ou revendiqués.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)