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1. (WO2018181516) CORELESS SUBSTRATE PREPREG, CORELESS SUBSTRATE, CORELESS SUBSTRATE MANUFACTURING METHOD AND SEMICONDUCTOR PACKAGE

Pub. No.:    WO/2018/181516    International Application No.:    PCT/JP2018/012846
Publication Date: Fri Oct 05 01:59:59 CEST 2018 International Filing Date: Thu Mar 29 01:59:59 CEST 2018
IPC: C08J 5/24
B32B 5/28
B32B 15/08
C08G 59/50
C08K 5/17
C08K 5/3415
C08L 33/04
H05K 1/03
H05K 3/46
Applicants: HITACHI CHEMICAL COMPANY, LTD.
日立化成株式会社
Inventors: SAKAMOTO, Norihiko
坂本 徳彦
YOKOTA, Hiroshi
横田 弘
HASHIMOTO, Shintaro
橋本 慎太郎
NAWATE, Katsuhiko
縄手 克彦
TSUCHIKAWA, Shinji
土川 信次
TAKANEZAWA, Shin
高根沢 伸
Title: CORELESS SUBSTRATE PREPREG, CORELESS SUBSTRATE, CORELESS SUBSTRATE MANUFACTURING METHOD AND SEMICONDUCTOR PACKAGE
Abstract:
Provided are: a coreless substrate prepreg; and a coreless substrate, a coreless substrate manufacturing method, and a semiconductor package which use said prepreg. The coreless substrate prepreg comprises a thermosetting resin composition containing: (a) a (meta)acrylic elastomer; (b) an amine compound having at least two primary amino groups; and (c) a maleimide compound having at least two N-substituted maleimide groups.