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1. (WO2018180570) SOLID-STATE IMAGE PICKUP ELEMENT, ELECTRONIC APPARATUS, AND SEMICONDUCTOR DEVICE
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Pub. No.: WO/2018/180570 International Application No.: PCT/JP2018/010378
Publication Date: 04.10.2018 International Filing Date: 16.03.2018
IPC:
H01L 27/146 (2006.01) ,H01L 25/065 (2006.01) ,H01L 25/07 (2006.01) ,H01L 25/18 (2006.01) ,H04N 5/369 (2011.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
14
including semiconductor components sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
144
Devices controlled by radiation
146
Imager structures
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
065
the devices being of a type provided for in group H01L27/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
07
the devices being of a type provided for in group H01L29/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
18
the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/-H01L51/160
H ELECTRICITY
04
ELECTRIC COMMUNICATION TECHNIQUE
N
PICTORIAL COMMUNICATION, e.g. TELEVISION
5
Details of television systems
30
Transforming light or analogous information into electric information
335
using solid-state image sensors [SSIS]
369
SSIS architecture; Circuitry associated therewith
Applicants: SONY SEMICONDUCTOR SOLUTIONS CORPORATION[JP/JP]; 4-14-1, Asahi-cho, Atsugi-shi, Kanagawa 2430014, JP
Inventors: TSUGAWA Hidenobu; JP
OGITA Tomoharu; JP
Agent: NISHIKAWA Takashi; JP
INAMOTO Yoshio; JP
Priority Data:
2017-06765530.03.2017JP
Title (EN) SOLID-STATE IMAGE PICKUP ELEMENT, ELECTRONIC APPARATUS, AND SEMICONDUCTOR DEVICE
(FR) ÉLÉMENT DE CAPTURE D’IMAGES À SEMI-CONDUCTEURS, APPAREIL ÉLECTRONIQUE, ET DISPOSITIF SEMI-CONDUCTEUR
(JA) 固体撮像素子、電子機器、および半導体装置
Abstract:
(EN) The present technology relates to: a solid-state image pickup element enabling to suppress deterioration of electrical characteristics in a well region of a semiconductor element formed on a thinned semiconductor substrate; an electronic apparatus, and a semiconductor device. The solid-state image pickup element according to the first aspect of the present technology is configured by laminating three or more layers of semiconductor substrates. Among the laminated semiconductor substrates, at least one semiconductor substrate is thinned, and in the thinned semiconductor substrate, an impurity region of a type that is same as the carrier type of the semiconductor substrate is formed between a well region and the thinned surface. The present technology can be applied to, for instance, CMOS image sensors.
(FR) La présente technologie porte sur : un élément de capture d’images à semi-conducteurs permettant de supprimer la détérioration de caractéristiques électriques dans une zone de puits d’un élément semi-conducteur formé sur un substrat semi-conducteur aminci ; un appareil électronique, et un dispositif semi-conducteur. L’élément de capture d’images à semi-conducteurs selon le premier aspect de la présente technologie est constitué en stratifiant trois couches ou plus de substrats semi-conducteurs. Parmi les substrats semi-conducteurs stratifiés, au moins un substrat semi-conducteur est aminci, et dans le substrat semi-conducteur aminci, une zone d’impuretés d’un type qui est identique au type de porteurs de charges du substrat semi-conducteur est formée entre une zone de puits et la surface amincie. La présente technologie peut être appliquée, par exemple, à des capteurs d’images à CMOS.
(JA) 本技術は、薄肉化する半導体基板に形成している半導体素子のwell領域における電気的特性の劣化を抑止することができるようにする固体撮像素子、電子機器、および半導体装置に関する。 本技術の第1の側面である固体撮像素子は、半導体基板が3層以上に積層されて構成される固体撮像素子において、積層されている前記半導体基板のうち、少なくとも1枚の前記半導体基板が薄肉化されており、薄肉化された前記半導体基板には、well領域と薄肉化された面との間に、前記半導体基板のキャリア型と同じ型の不純物領域が形成されている。本技術は、例えば、CMOSイメージセンサに適用できる。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)