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1. (WO2018180508) MICROCHANNEL CHIP MANUFACTURING METHOD
Latest bibliographic data on file with the International BureauSubmit observation

Pub. No.: WO/2018/180508 International Application No.: PCT/JP2018/010073
Publication Date: 04.10.2018 International Filing Date: 14.03.2018
IPC:
B81C 3/00 (2006.01) ,B01J 19/00 (2006.01) ,G01N 35/08 (2006.01) ,G01N 37/00 (2006.01)
B PERFORMING OPERATIONS; TRANSPORTING
81
MICRO-STRUCTURAL TECHNOLOGY
C
PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICRO-STRUCTURAL DEVICES OR SYSTEMS
3
Assembling of devices or systems from individually processed components
B PERFORMING OPERATIONS; TRANSPORTING
01
PHYSICAL OR CHEMICAL PROCESSES OR APPARATUS IN GENERAL
J
CHEMICAL OR PHYSICAL PROCESSES, e.g. CATALYSIS, COLLOID CHEMISTRY; THEIR RELEVANT APPARATUS
19
Chemical, physical, or physico-chemical processes in general; Their relevant apparatus
G PHYSICS
01
MEASURING; TESTING
N
INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
35
Automatic analysis not limited to methods or materials provided for in any single one of groups G01N1/-G01N33/148; Handling materials therefor
08
using a stream of discrete samples flowing along a tube system, e.g. flow injection analysis
G PHYSICS
01
MEASURING; TESTING
N
INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
37
Details not covered by any other group of this subclass
Applicants:
日本ゼオン株式会社 ZEON CORPORATION [JP/JP]; 東京都千代田区丸の内一丁目6番2号 6-2, Marunouchi 1-chome, Chiyoda-ku Tokyo 1008246, JP
Inventors:
千葉 大道 CHIBA Daido; JP
荒井 邦仁 ARAI Kunihito; JP
澤口 太一 SAWAGUCHI Taichi; JP
相沢 光一 AIZAWA Mitsukazu; JP
有留 憲之 ARITOME Noriyuki; JP
Agent:
杉村 憲司 SUGIMURA Kenji; JP
Priority Data:
2017-06890130.03.2017JP
Title (EN) MICROCHANNEL CHIP MANUFACTURING METHOD
(FR) PROCÉDÉ DE FABRICATION DE PUCE À MICROCANAL
(JA) マイクロ流路チップの製造方法
Abstract:
(EN) The present invention provides a microchannel chip manufacturing method that enables manufacturing of a resin microchannel chip high in initial joining strength after being manufactured and suppressed in deformation of microchannels. The microchannel chip manufacturing method according to the present invention is for manufacturing a microchannel chip by joining a resin lid substrate and a resin channel substrate having microchannels formed on at least one surface, and includes: a step (A) for applying surface modification treatment on the joining surfaces of the channel substrate and the lid substrate; and a step (B) for superimposing the joining surfaces of the channel substrate and the lid substrate after the step (A), and applying pressure on, while heating, the channel substrate and the lid substrate via a fluid or an elastic body having a durometer hardness of E20 or lower.
(FR) La présente invention concerne un procédé de fabrication de puce à microcanal qui permet la fabrication d'une puce à microcanal en résine présentant une haute résistance initiale d'assemblage après fabrication et où la déformation des microcanaux est supprimée. Le procédé de fabrication de puce à microcanal selon la présente invention est destiné à la fabrication d'une puce à microcanal par assemblage d'un substrat de couvercle en résine et d'un substrat de canal en résine comportant des microcanaux formés sur au moins une surface, et comprend : une étape (A) permettant d'appliquer un traitement de modification de surface sur les surfaces d'assemblage du substrat de canal et du substrat de couvercle ; et une étape (B) permettant de superposer les surfaces d'assemblage du substrat de canal et du substrat de couvercle après l'étape (A), et d'appliquer une pression, tout en chauffant, sur le substrat de canal et le substrat de couvercle par l'intermédiaire d'un fluide ou d'un corps élastique ayant une dureté au duromètre inférieure ou égale à E20.
(JA) 本発明は、製造後初期の接合強度に優れ、且つ、微細な流路の変形が抑制された樹脂製のマイクロ流路チップを製造することが可能なマイクロ流路チップの製造方法を提供する。本発明のマイクロ流路チップの製造方法は、少なくとも一方の表面に微細な流路を形成した樹脂製の流路基板と、樹脂製の蓋基板とを接合してマイクロ流路チップを製造する方法であって、流路基板および蓋基板の接合面に表面改質処理を施す工程(A)と、工程(A)の後に、流路基板の接合面と蓋基板の接合面とを重ね合わせ、加熱下、流体またはデュロメータ硬さがE20以下の弾性体を介して流路基板および蓋基板を加圧する工程(B)とを含む。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)