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1. (WO2018180146) SEMICONDUCTOR DEVICE, COMPLEMENTARY SEMICONDUCTOR DEVICE, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, WIRELESS COMMUNICATION DEVICE AND PRODUCT TAG
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Pub. No.: WO/2018/180146 International Application No.: PCT/JP2018/007469
Publication Date: 04.10.2018 International Filing Date: 28.02.2018
IPC:
H01L 21/336 (2006.01) ,C01B 32/158 (2017.01) ,H01L 21/208 (2006.01) ,H01L 21/312 (2006.01) ,H01L 29/786 (2006.01) ,H01L 51/05 (2006.01) ,H01L 51/30 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
[IPC code unknown for C01B 32/158]
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
20
Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
208
using liquid deposition
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31
to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
312
Organic layers, e.g. photoresist
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
51
Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof
05
specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
51
Solid state devices using organic materials as the active part, or using a combination of organic materials with other materials as the active part; Processes or apparatus specially adapted for the manufacture or treatment of such devices, or of parts thereof
05
specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier
30
Selection of materials
Applicants: TORAY INDUSTRIES, INC.[JP/JP]; 1-1, Nihonbashi-Muromachi 2-chome, Chuo-ku, Tokyo 1038666, JP
Inventors: ISOGAI, Kazuki; JP
MURASE, Seiichiro; JP
SAKII, Daisuke; JP
Priority Data:
2017-06042627.03.2017JP
Title (EN) SEMICONDUCTOR DEVICE, COMPLEMENTARY SEMICONDUCTOR DEVICE, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, WIRELESS COMMUNICATION DEVICE AND PRODUCT TAG
(FR) DISPOSITIF À SEMI-CONDUCTEUR, DISPOSITIF À SEMI-CONDUCTEUR COMPLÉMENTAIRE, PROCÉDÉ DE FABRICATION DE DISPOSITIF À SEMI-CONDUCTEUR, DISPOSITIF DE COMMUNICATION SANS FIL ET ÉTIQUETTE DE PRODUIT
(JA) 半導体素子、相補型半導体装置、半導体素子の製造方法、無線通信装置および商品タグ
Abstract:
(EN) The present invention addresses the problem of providing a semiconductor device having stable n-type semiconductor characteristics without deterioration over time. The purpose of the present invention is to provide a semiconductor device provided with: a substrate; a source electrode, a drain electrode and a gate electrode; a semiconductor layer which contacts the source electrode and the drain electrode; a gate insulation layer which insulates the semiconductor layer from the gate electrode; and a second insulation layer which contacts the semiconductor layer on a side opposite to the gate insulation layer with respect to the semiconductor layer, wherein the semiconductor device is characterized in that the semiconductor layer contains carbon nanotubes, the second insulation layer contains electron-donating compounds including at least any one selected from among nitrogen atoms and phosphorous atoms, and the oxygen permeability of the second insulation layer is equal to or less than 4.0 cc/(m2·24h·atm).
(FR) La présente invention aborde le problème de la fourniture d'un dispositif à semi-conducteur ayant des caractéristiques de semi-conducteur de type n stables sans détérioration au fil du temps. Le but de la présente invention est de fournir un dispositif à semi-conducteur comportant : un substrat; une électrode de source, une électrode de drain et une électrode de grille; une couche semi-conductrice qui entre en contact avec l'électrode de source et l'électrode de drain; une couche d'isolation de grille qui isole la couche semi-conductrice de l'électrode de grille; et une seconde couche d'isolation qui est en contact avec la couche semi-conductrice sur un côté opposé à la couche d'isolation de grille par rapport à la couche semi-conductrice, le dispositif à semi-conducteur étant caractérisé en ce que la couche semi-conductrice contient des nanotubes de carbone, la seconde couche d'isolation contient des composés donneurs d'électrons comprenant au moins un atome choisi parmi des atomes d'azote et des atomes de phosphore, et la perméabilité à l'oxygène de la seconde couche d'isolation est inférieure ou égale à 4,0 cc/(m2·24h·atm).
(JA) 本発明は、経時的劣化のない、安定な、n型半導体特性を有する半導体素子を提供することを課題とし、 基材と、 ソース電極、ドレイン電極およびゲート電極と、 前記ソース電極およびドレイン電極と接する半導体層と、 前記半導体層を前記ゲート電極と絶縁するゲート絶縁層と、 前記半導体層に対して前記ゲート絶縁層とは反対側で前記半導体層と接する第2絶縁層と、を備えた半導体素子であって、 前記半導体層が、カーボンナノチューブを含有し、 前記第2絶縁層が、窒素原子およびリン原子から選ばれるいずれか1種以上を有する電子供与性化合物を含有し、 前記第2絶縁層の酸素透過度が、4.0cc/(m・24h・atm)以下であることを特徴とする、 半導体素子とすることを本旨とする。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)