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1. (WO2018178140) LIGHTING ASSEMBLY WITH REDUCED ALIGNMENT TOLERANCES
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/178140 International Application No.: PCT/EP2018/057899
Publication Date: 04.10.2018 International Filing Date: 28.03.2018
IPC:
H05K 3/30 (2006.01) ,H01L 25/075 (2006.01) ,H01L 33/00 (2010.01) ,H01L 23/00 (2006.01) ,F21S 41/65 (2018.01) ,F21S 41/143 (2018.01)
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3
Apparatus or processes for manufacturing printed circuits
30
Assembling printed circuits with electric components, e.g. with resistor
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
075
the devices being of a type provided for in group H01L33/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33
Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
[IPC code unknown for F21S 41/65][IPC code unknown for F21S 41/143]
Applicants: LUMILEDS HOLDING B.V.[NL/NL]; The Base, Tower B5 unit 107 Evert van de Beekstraat 1 1118 CL Schiphol, NL (AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BE, BF, BG, BH, BJ, BN, BR, BW, BY, BZ, CA, CF, CG, CH, CI, CL, CM, CN, CO, CR, CU, CY, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, FR, GA, GB, GD, GE, GH, GM, GN, GQ, GR, GT, GW, HN, HR, HU, ID, IE, IL, IN, IR, IS, IT, JO, JP, KE, KG, KH, KM, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MC, MD, ME, MG, MK, ML, MN, MR, MT, MW, MX, MY, MZ, NA, NE, NG, NI, NL, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SI, SK, SL, SM, SN, ST, SV, SY, SZ, TD, TG, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, UZ, VC, VN, ZA, ZM, ZW)
LUMILEDS LLC[US/US]; 370 West Trimble Road San Jose, California 95131, US (US)
Inventors: DECKERS, Michael; DE
Agent: TER HEEGDE, Paul; DE
Priority Data:
17163765.530.03.2017EP
Title (EN) LIGHTING ASSEMBLY WITH REDUCED ALIGNMENT TOLERANCES
(FR) ENSEMBLE D'ÉCLAIRAGE À TOLÉRANCES D'ALIGNEMENT RÉDUITE
Abstract:
(EN) The invention describes an relates to a method (100) providing a lighting assembly (10) comprising the steps of providing (110) the pre-assembly (1) of an array of point like light sources (2) with a three-dimensional positioning accuracy having position tolerances in the range of 20μιη or less between the point-like light sources (2), where each of the point-like light sources (2) having an light emitting side (21) and contacting backside (22) for electrically contacting and being reversibly mounted on a temporary holder (4) with their emitting surfaces (21), providing (120) the substrate (3) comprising an array of electrical substrate contacts (32) being aligned to the position of the point-like light sources (2) on the temporary holder (4) and simultaneously mounting (130) the contacting backsides (22) of the point-like light source (2) on the electrical substrate contacts (32) of the substrate (3) maintaining the positioning accuracy of the pre-assembly (1).
(FR) L'invention concerne un procédé (100) fournissant un ensemble d'éclairage (10) comprenant les étapes consistant à fournir (110) le pré-ensemble (1) d'un réseau de sources de lumière ponctuelles (2) avec une précision de positionnement tridimensionnelle dont les tolérances de position se situent dans la plage de 20 µm ou moins entre les sources de lumière ponctuelles (2), chacune des sources de lumière ponctuelles (2) ayant une face émettrice de lumière (21) et une face arrière de mise en contact (22) permettant une mise en contact électrique et étant montée de manière réversible sur un support temporaire (4) avec leurs surfaces émettrices (21), à fournir (120) le substrat (3) comprenant un réseau de contacts électriques de substrat (32) qui sont alignés sur la position des sources de lumière ponctuelles (2) sur le support temporaire (4) et à monter simultanément (130) les faces arrière de contact (22) de la source de lumière ponctuelle (2) sur les contacts électriques de substrat (32) du substrat (3) en conservant la précision de positionnement du pré-ensemble (1).
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)