An integrated circuit is described. The integrated circuit includes a first layer, a first clock line for carrying a first clock signal, and a second clock line for carrying a second clock signal. The second clock line runs alongside the first clock line for a distance. The integrated circuit includes a shield structure for shielding the clock line from at least one of crosstalk and other interference. The shield structure includes a shield wall extending from the first layer. The shield wall runs between the first and second clock lines for at least a portion of the distance. The shield structure may also include a shield cage extending from the first layer and surrounding the first and second clock lines for at least a portion of the distance. The shield cage has a plurality of openings. At least one of the shield cage and shield wall may be connected to the ground of an AC power supply.