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1. (WO2018176490) CMOS IMAGE SENSOR WITH XY ADDRESS EXPOSURE CONTROL
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/176490 International Application No.: PCT/CN2017/079357
Publication Date: 04.10.2018 International Filing Date: 01.04.2017
IPC:
G09G 3/32 (2016.01)
G PHYSICS
09
EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
G
ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3
Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20
for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
22
using controlled light sources
30
using electroluminescent panels
32
semiconductive, e.g. diodes
Applicants: HUAWEI TECHNOLOGIES CO., LTD.[CN/CN]; Huawei Administration Building, Bantian Longgang District Shenzhen, Guangdong 518129, CN
Inventors: MONOI, Makoto; JP
Priority Data:
Title (EN) CMOS IMAGE SENSOR WITH XY ADDRESS EXPOSURE CONTROL
(FR) CAPTEUR D'IMAGE CMOS AYANT UNE COMMANDE D'EXPOSITION D'ADRESSE XY
Abstract:
(EN) The present invention provides a CMOS image sensor. The CMOS image sensor includes: pixel circuits which are arranged in two dimensional manner, wherein each pixel circuit includes: a switching transistor (SW), a gate of which is connected to one of a horizontal pulse line and a vertical address line, a source of which is connected to the other of the horizontal pulse line and the vertical address line, and a drain of which is connected to a gate of a transfer gate (TG); the TG, the gate of which is connected to a drain of the SW, and a source of which is connected to a cathode of a photodiode (PD); and the PD, an anode of which is connected to a ground, and the cathode of which is connected to a source of the TG. The present invention achieves to control exposure time more finely and make the pixel size smaller.
(FR) La présente invention concerne un capteur d'image CMOS. Le capteur d'image CMOS comprend : des circuits de pixel qui sont agencés de manière bidimensionnelle, chaque circuit de pixel comprenant : un transistor de commutation (SW), dont une grille est connectée à une ligne d'impulsion horizontale ou à une ligne d'adresse verticale, dont une source est connectée à l'autre de la ligne d'impulsion horizontale et de la ligne d'adresse verticale, et dont un drain est connecté à une grille d'une grille de transfert (TG) ; la grille TG dont la grille est connectée à un drain du transistor SW, et dont une source est connectée à une cathode d'une photodiode (PD) ; et la photodiode, dont une anode est connectée à une masse, et dont la cathode est connectée à une source de la grille TG. La présente invention permet de réguler le temps d'exposition de manière plus fine et de rendre la taille de pixel plus petite.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)