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1. (WO2018164762) MULTI-PROCESSOR CORE THREE-DIMENSIONAL (3D) INTEGRATED CIRCUITS (ICS) (3DICS), AND RELATED METHODS
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Pub. No.: WO/2018/164762 International Application No.: PCT/US2018/012077
Publication Date: 13.09.2018 International Filing Date: 02.01.2018
Chapter 2 Demand Filed: 31.07.2018
IPC:
G06F 15/76 (2006.01) ,H01L 21/822 (2006.01) ,H01L 25/065 (2006.01) ,H01L 27/06 (2006.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
15
Digital computers in general; Data processing equipment in general
76
Architectures of general purpose stored programme computers
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78
with subsequent division of the substrate into plural individual devices
82
to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822
the substrate being a semiconductor, using silicon technology
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
065
the devices being of a type provided for in group H01L27/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04
the substrate being a semiconductor body
06
including a plurality of individual components in a non-repetitive configuration
Applicants:
QUALCOMM INCORPORATED [US/US]; Attn: International IP Administration 5775 Morehouse Drive San Diego, CA 92121-1714, US
Inventors:
SAMADI, Kambiz; US
ANSARI, Amin; US
DU, Yang; US
Agent:
DAVENPORT, Taylor, M.; US
TERRANOVA, Steven, N.; US
Priority Data:
15/452,29907.03.2017US
Title (EN) MULTI-PROCESSOR CORE THREE-DIMENSIONAL (3D) INTEGRATED CIRCUITS (ICS) (3DICS), AND RELATED METHODS
(FR) CIRCUITS INTÉGRÉS (IC) TRIDIMENSIONNELS (3D) (3DIC) DE PROCESSEUR À CŒURS MULTIPLES ET PROCÉDÉS ASSOCIÉS
Abstract:
(EN) Multi-processor core three-dimensional (3D) integrated circuits (ICs) (3DICs) and related methods are disclosed. In aspects disclosed herein, ICs are provided that include a central processing unit (CPU) having multiple processor cores ("cores") to improve performance. To further improve CPU performance, the multiple cores can also be designed to communicate with each other to offload workloads and/or share resources for parallel processing, but at a communication overhead associated with passing data through interconnects which have an associated latency. To mitigate this communication overhead inefficiency, aspects disclosed herein provide the CPU with its multiple cores in a 3DIC. Because 3DICs can overlap different IC tiers and/or align similar components in the same IC tier, the cores can be designed and located between or within different IC tiers in a 3DIC to reduce communication distance associated with processor core communication to share workload and/or resources, thus improving performance of the multi-processor CPU design.
(FR) L'invention concerne des circuits intégrés (IC) tridimensionnels (3D) (3DIC) de processeur à cœurs multiples et des procédés associés. Selon certains aspects, l'invention concerne des IC comprenant une unité centrale de traitement (CPU) pourvue de multiples cœurs de processeur (« cœurs ») destinés à améliorer les performances. Pour améliorer encore les performances de la CPU, les multiples cœurs peuvent également être conçus pour communiquer les uns avec les autres afin de décharger des charges de travail et/ou de partager des ressources en vue d'un traitement parallèle, mais uniquement à un surdébit de communication associé aux données passant par des interconnexions ayant une latence associée. Pour atténuer cette inefficacité du surdébit de communication, des aspects de l'invention concernent la CPU à cœurs multiples dans un 3DIC. Puisque les 3DIC peuvent chevaucher différents niveaux d'IC et/ou aligner des composants similaires au même niveau d'IC, les cœurs peuvent être conçus et situés entre ou à différents niveaux d'IC dans un 3DIC de façon à réduire une distance de communication associée à une communication de cœurs de processeur visant à partager une charge de travail et/ou des ressources, ce qui améliore les performances de la conception de la CPU à processeurs multiples.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)