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1. (WO2018164655) ISOLATION IN INTEGRATED CIRCUIT DEVICES

Pub. No.:    WO/2018/164655    International Application No.:    PCT/US2017/020842
Publication Date: Fri Sep 14 01:59:59 CEST 2018 International Filing Date: Mon Mar 06 00:59:59 CET 2017
IPC: H01L 21/768
H01L 21/324
H01L 29/06
H01L 29/772
H01L 21/762
Applicants: INTEL CORPORATION
Inventors: PARK, Sang-Won
HANKEN, Dennis G.
BHOWMICK, Sishir
PIPES, Leonard C.
Title: ISOLATION IN INTEGRATED CIRCUIT DEVICES
Abstract:
Disclosed herein are techniques for providing isolation in integrated circuit (IC) devices, as well as IC devices and computing systems that utilize such techniques. In some embodiments, a protective layer may be disposed on a structure in an IC device, prior to deposition of additional dielectric material, and the resulting assembly may be treated to form a dielectric layer around the structure.