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1. (WO2018163944) SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND LIQUID CRYSTAL DISPLAY
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Pub. No.: WO/2018/163944 International Application No.: PCT/JP2018/007668
Publication Date: 13.09.2018 International Filing Date: 01.03.2018
IPC:
H01L 29/786 (2006.01) ,G02F 1/1343 (2006.01) ,G02F 1/1368 (2006.01) ,H01L 21/336 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
G PHYSICS
02
OPTICS
F
DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
1
Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
01
for the control of the intensity, phase, polarisation or colour
13
based on liquid crystals, e.g. single liquid crystal display cells
133
Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
1333
Constructional arrangements
1343
Electrodes
G PHYSICS
02
OPTICS
F
DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH IS MODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THE DEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY, COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g. SWITCHING, GATING, MODULATING OR DEMODULATING; TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF; FREQUENCY-CHANGING; NON-LINEAR OPTICS; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
1
Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
01
for the control of the intensity, phase, polarisation or colour
13
based on liquid crystals, e.g. single liquid crystal display cells
133
Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
136
Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
1362
Active matrix addressed cells
1368
in which the switching element is a three-electrode device
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
Applicants:
シャープ株式会社 SHARP KABUSHIKI KAISHA [JP/JP]; 大阪府堺市堺区匠町1番地 1, Takumi-cho, Sakai-ku, Sakai City, Osaka 5908522, JP
Inventors:
古川 博章 FURUKAWA, Hiroaki; --
Agent:
特許業務法人 安富国際特許事務所 YASUTOMI & ASSOCIATES; 大阪府大阪市淀川区宮原3丁目5番36号 5-36, Miyahara 3-chome, Yodogawa-ku, Osaka-shi, Osaka 5320003, JP
Priority Data:
2017-04406308.03.2017JP
Title (EN) SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE, AND LIQUID CRYSTAL DISPLAY
(FR) DISPOSITIF À SEMICONDUCTEUR, PROCÉDÉ DE FABRICATION D'UN DISPOSITIF À SEMICONDUCTEUR ET AFFICHAGE À CRISTAUX LIQUIDES
(JA) 半導体装置、半導体装置の製造方法、及び、液晶表示装置
Abstract:
(EN) The present invention provides a semiconductor device capable of ensuring a high level of reliability while realizing higher definition. This semiconductor device comprises a substrate and a thin-film transistor supported by the substrate, wherein the thin-film transistor is provided with: a first conductive section formed on the substrate; a first insulating layer; an oxide semiconductor layer; a second conductive section which contacts a source contact region of the oxide semiconductor layer; a second insulating layer provided with a contact hole for exposing a drain contact region of the oxide semiconductor layer; and a transparent electrode contacting the drain contact region at the contact hole; and when viewed from the normal direction of the substrate, an outer edge of the drain contact region overlaps a portion of an outer edge of the first conductive section, or is arranged further to the inside than the outer edge of the first conductive section.
(FR) La présente invention concerne un dispositif à semiconducteur capable d'assurer un niveau élevé de fiabilité tout en réalisant une définition plus élevée. Ce dispositif à semiconducteur comprend un substrat et un transistor à couches minces supporté par le substrat, le transistor à couches minces comprenant : une première section conductrice formée sur le substrat; une première couche d'isolation; une couche semiconductrice d'oxyde; une seconde section conductrice qui entre en contact avec une région de contact de source de la couche semiconductrice d'oxyde; une seconde couche d'isolation comprend un trou de contact pour exposer une région de contact de drain de la couche semiconductrice d'oxyde; et une électrode transparente en contact avec la région de contact de drain au niveau du trou de contact; et lorsqu'elle est vue depuis la direction normale du substrat, un bord externe de la région de contact de drain chevauche une partie d'un bord externe de la première section conductrice, ou est disposé davantage vers l'intérieur que le bord externe de la première section conductrice.
(JA) 本発明は、高精細化を実現しつつ、高い信頼性を確保できる半導体装置を提供する。 本発明の半導体装置は、基板と、上記基板に支持された薄膜トランジスタとを備える半導体装置であって、上記薄膜トランジスタは、上記基板上に形成された第一導電部と、第一絶縁層と、酸化物半導体層と、上記酸化物半導体層のソースコンタクト領域と接する第二導電部と、上記酸化物半導体層のドレインコンタクト領域を露出するコンタクトホールが設けられた第二絶縁層と、上記コンタクトホールにおいて上記ドレインコンタクト領域と接する透明電極とを備え、上記基板の法線方向から見たとき、上記ドレインコンタクト領域の外縁は、上記第一導電部の外縁の一部と重なるか、又は、上記第一導電部の外縁よりも内側に配置されるものである。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)