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1. (WO2018163737) CONTROL CIRCUIT, SEMICONDUCTOR MEMORY DEVICE, INFORMATION PROCESSING DEVICE, AND CONTROL METHOD
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Pub. No.: WO/2018/163737 International Application No.: PCT/JP2018/005125
Publication Date: 13.09.2018 International Filing Date: 14.02.2018
IPC:
G11C 11/16 (2006.01) ,G11C 7/14 (2006.01) ,G11C 13/00 (2006.01)
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
11
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
02
using magnetic elements
16
using elements in which the storage effect is based on magnetic spin effect
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
7
Arrangements for writing information into, or reading information out from, a digital store
14
Dummy cell management; Sense reference voltage generators
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
13
Digital stores characterised by the use of storage elements not covered by groups G11C11/, G11C23/, or G11C25/173
Applicants:
ソニーセミコンダクタソリューションズ株式会社 SONY SEMICONDUCTOR SOLUTIONS CORPORATION [JP/JP]; 神奈川県厚木市旭町四丁目14番1号 4-14-1, Asahi-cho, Atsugi-shi, Kanagawa 2430014, JP
Inventors:
手塚 宙之 TEZUKA, Hiroyuki; JP
Agent:
亀谷 美明 KAMEYA, Yoshiaki; JP
金本 哲男 KANEMOTO, Tetsuo; JP
萩原 康司 HAGIWARA, Yasushi; JP
Priority Data:
2017-04501409.03.2017JP
Title (EN) CONTROL CIRCUIT, SEMICONDUCTOR MEMORY DEVICE, INFORMATION PROCESSING DEVICE, AND CONTROL METHOD
(FR) CIRCUIT DE COMMANDE, DISPOSITIF DE MÉMOIRE À SEMI-CONDUCTEURS, DISPOSITIF DE TRAITEMENT D'INFORMATIONS ET PROCÉDÉ DE COMMANDE
(JA) 制御回路、半導体記憶装置、情報処理装置及び制御方法
Abstract:
(EN) [Problem] To provide a control circuit that is capable of reliably generating a reference potential while suppressing an increase in power consumption or an increase in cost. [Solution] Provided is a control circuit that, when generating a reference potential to be used for reading data from a memory cell through a sense amplifier, performs a control such that a second reference element, which is connected to the sense amplifier and set to a prescribed resistance state, and which differs from a first reference element set to a predetermined resistance state, is disconnected from the sense amplifier.
(FR) [Problème] Fournir un circuit de commande qui est capable de générer de manière fiable un potentiel de référence tout en supprimant une augmentation de la consommation d'énergie ou une augmentation du coût. La solution selon l'invention porte sur un circuit de commande qui, lors de la génération d'un potentiel de référence à utiliser pour lire des données à partir d'une cellule de mémoire par l'intermédiaire d'un amplificateur de détection, effectue une commande de sorte qu'un second élément de référence, qui est connecté à l'amplificateur de détection et réglé à un état de résistance prescrit, et qui diffère d'un premier élément de référence réglé à un état de résistance prédéterminé, soit déconnecté de l'amplificateur de détection.
(JA) 【課題】消費電力の増加やコストの増大を抑えつつ、確実な参照電位の生成が可能な制御回路を提供する。 【解決手段】メモリセルからのセンスアンプを通じたデータの読み出しに用いられる参照電位を生成する際に前記センスアンプと接続される、所定の抵抗状態に設定された第1の参照素子とは異なる、所定の抵抗状態に設定された第2の参照素子を前記センスアンプから切り離すよう制御する、制御回路が提供される。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)