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1. (WO2018161528) SHIFT REGISTER UNIT, DRIVING METHOD THEREFOR, GATE DRIVING CIRCUIT, AND DISPLAY DEVICE

Pub. No.:    WO/2018/161528    International Application No.:    PCT/CN2017/102681
Publication Date: Fri Sep 14 01:59:59 CEST 2018 International Filing Date: Fri Sep 22 01:59:59 CEST 2017
IPC: G09G 3/3225
Applicants: BOE TECHNOLOGY GROUP CO., LTD.
京东方科技集团股份有限公司
ORDOS YUANSHENG OPTOELECTRONICS CO., LTD.
鄂尔多斯市源盛光电有限责任公司
Inventors: WANG, Bo
王博
Title: SHIFT REGISTER UNIT, DRIVING METHOD THEREFOR, GATE DRIVING CIRCUIT, AND DISPLAY DEVICE
Abstract:
A shift register unit (100), a driving method therefor, a gate driving circuit (500), and a display device (700). The shift register unit (100) comprises a shift register circuit (110) and an inverter circuit (120). The shift register circuit (110) lags, according to a first clock signal (CK1) and a second clock signal (CK2) having opposite phases to each other, the phase of an input signal from an input end (STV), so as to output a first output signal at a first output end (OUT1). The inverter circuit (120) generates an inversion signal of the first output signal and outputs the inversion signal at a second output (OUT2). The shift register circuit (110) comprises: a first input circuit (111) controlling the potential of a first node (N1) according to the input signal; a second input circuit (112) controlling the potential of a second node (N2) according to the first clock signal (CK1); a latch circuit (113) coupled between the first node (N1) and the second node (N2), and latching the potentials of the first node (N1) and the second node (N2) to keep the potentials opposite to each other in phase; and a first output circuit (114) selectively outputting the second clock signal (CK2) or a first potential (VGH) at the first output end (OUT1) according to the potentials of the first node (N1) and the second node (N2).