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1. (WO2018159329) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
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Pub. No.: WO/2018/159329 International Application No.: PCT/JP2018/005509
Publication Date: 07.09.2018 International Filing Date: 16.02.2018
IPC:
H01L 23/29 (2006.01) ,B29C 33/12 (2006.01) ,B29C 39/10 (2006.01) ,B29C 39/24 (2006.01) ,H01L 21/56 (2006.01) ,H01L 23/31 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
28
Encapsulation, e.g. encapsulating layers, coatings
29
characterised by the material
B PERFORMING OPERATIONS; TRANSPORTING
29
WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
C
SHAPING OR JOINING OF PLASTICS; SHAPING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL; AFTER- TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
33
Moulds or cores; Details thereof or accessories therefor
12
with incorporated means for positioning inserts, e.g. labels
B PERFORMING OPERATIONS; TRANSPORTING
29
WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
C
SHAPING OR JOINING OF PLASTICS; SHAPING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL; AFTER- TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
39
Shaping by casting, i.e. introducing the moulding material into a mould or between confining surfaces without significant moulding pressure; Apparatus therefor
02
for making articles of definite length, i.e. discrete articles
10
incorporating preformed parts or layers, e.g. casting around inserts or for coating articles
B PERFORMING OPERATIONS; TRANSPORTING
29
WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
C
SHAPING OR JOINING OF PLASTICS; SHAPING OF SUBSTANCES IN A PLASTIC STATE, IN GENERAL; AFTER- TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
39
Shaping by casting, i.e. introducing the moulding material into a mould or between confining surfaces without significant moulding pressure; Apparatus therefor
22
Component parts, details or accessories; Auxiliary operations
24
Feeding the material into the mould
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
56
Encapsulations, e.g. encapsulating layers, coatings
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
28
Encapsulation, e.g. encapsulating layers, coatings
31
characterised by the arrangement
Applicants:
株式会社デンソー DENSO CORPORATION [JP/JP]; 愛知県刈谷市昭和町1丁目1番地 1-1, Showa-cho, Kariya-city, Aichi 4488661, JP
Inventors:
泉 龍介 IZUMI Ryosuke; JP
吉田 典史 YOSHIDA Norihito; JP
Agent:
特許業務法人ゆうあい特許事務所 YOU-I PATENT FIRM; 愛知県名古屋市中区錦一丁目6番5号 名古屋錦シティビル4階 Nagoya Nishiki City Bldg. 4F 1-6-5, Nishiki, Naka-ku, Nagoya-shi, Aichi 4600003, JP
Priority Data:
2017-03727728.02.2017JP
Title (EN) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME
(FR) DISPOSITIF À SEMICONDUCTEUR ET SON PROCÉDÉ DE FABRICATION
(JA) 半導体装置およびその製造方法
Abstract:
(EN) This semiconductor device is provided with: a primary molded body (10) formed by having a semiconductor chip (12) that has a detection unit for detecting physical quantities, and a primary molded resin (13) formed of a resin material; a housing component (20), in which an insertion hole (21) for inserting the primary molded body is formed; and a secondary molded resin (30), which is formed of a resin material, and which integrally covers a region exposed from the insertion hole, said region being a part of the surface of the primary molded body, and a housing component surface region including a region surrounding the insertion hole. A primary molded body portion including the semiconductor chip is inserted into the insertion hole.
(FR) L'invention concerne un dispositif à semiconducteur comprenant : un corps moulé primaire (10) formé en ayant une puce semiconductrice (12) qui a une unité de détection pour détecter des quantités physiques, et une résine moulée primaire (13) formée d'un matériau de résine; un composant de boîtier (20), dans lequel un trou d'insertion (21) pour insérer le corps moulé primaire est formé; et une résine moulée secondaire (30), qui est formée d'un matériau de résine, et qui recouvre d'un seul tenant une région exposée à partir du trou d'insertion, ladite région étant une partie de la surface du corps moulé primaire, et une région de surface de composant de boîtier comprenant une région entourant le trou d'insertion. Une portion de corps moulé primaire comprenant la puce semiconductrice est insérée dans le trou d'insertion.
(JA) 半導体装置は、物理量を検出する検出部を有する半導体チップ(12)と樹脂材料によりなる一次成形樹脂(13)とを有してなる一次成形体(10)と、一次成形体が挿入されるための挿入穴(21)が形成された筐体部品(20)と、樹脂材料によりなり、一次成形体の表面のうち挿入穴から露出した領域と筐体部品の表面のうち挿入穴を囲む領域を含む一部の領域とを一体的に覆う二次成形樹脂(30)と、を備える。一次成形体のうち半導体チップを含む部分は、挿入穴に挿入されている。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)