Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO2018157573) GATE ELECTRODE STRUCTURE AND MANUFACTURING METHOD THEREFOR, AND DISPLAY DEVICE
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/157573 International Application No.: PCT/CN2017/100441
Publication Date: 07.09.2018 International Filing Date: 05.09.2017
IPC:
H01L 21/28 (2006.01) ,H01L 27/12 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28
Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/268158
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12
the substrate being other than a semiconductor body, e.g. an insulating body
Applicants:
惠科股份有限公司 HKC CORPORATION LIMITED [CN/CN]; 中国广东省深圳市 宝安区石岩街道水田村民营工业园惠科工业园 Huike Industrial Park, Minying Industrial Park, Shuitian Country Shiyan, Bao'an District Shenzhen, Guangdong 518000, CN
重庆惠科金渝光电科技有限公司 CHONGQING HKC OPTOELECTRONICS TECHNOLOGY CO., LTD. [CN/CN]; 中国重庆市 巴南区界石镇石景路1号 No.1 Shijing Rd., Jieshi Town, Ba'nan District Chongqing 401320, CN
Inventors:
简重光 CHIEN, Chung-Kuang; CN
Agent:
北京汇泽知识产权代理有限公司 BEIJING HUIZE INTELLECTUAL PROPERTY LAW LLC; 中国北京市 海淀区知春路6号锦秋国际大厦A座18层张瑾 ZHANG, Jin A18, Horizon International Tower, No.6, Zhichun Road, Haidian District Beijing 100088, CN
Priority Data:
201710123214.103.03.2017CN
Title (EN) GATE ELECTRODE STRUCTURE AND MANUFACTURING METHOD THEREFOR, AND DISPLAY DEVICE
(FR) STRUCTURE D'ÉLECTRODE DE GRILLE ET PROCÉDÉ DE FABRICATION DE CELLE-CI, ET DISPOSITIF D'AFFICHAGE
(ZH) 一种闸电极结构及其制造方法和显示装置
Abstract:
(EN) The present invention relates to the technical field of display, and provides a gate electrode structure and a manufacturing method therefor. The method comprises: forming a buffer layer on the surface of a side of a substrate; forming a groove in the buffer layer, the groove penetrating through the buffer layer; forming a gate electrode in the groove, an upper surface of the gate electrode and an upper surface of the buffer layer being on the same plane; forming an insulating layer on the upper surface of the gate electrode and the upper surface of the buffer layer; forming a semiconductor layer opposite to the gate electrode on an upper surface of the insulating layer; and forming a data line partially overlapped with the semiconductor layer on the upper surface of the semiconductor layer and/or the upper surface of the insulating layer. Also disclosed is a display device, comprising the gate electrode structure.
(FR) La présente invention se rapporte au domaine technique de l'affichage, et concerne une structure d'électrode de grille et un procédé de fabrication de celle-ci. Le procédé consiste à : former une couche tampon sur la surface d'un côté d'un substrat ; former une rainure dans la couche tampon, la rainure pénétrant à travers la couche tampon ; former une électrode de grille dans la rainure, une surface supérieure de l'électrode de grille et une surface supérieure de la couche tampon se trouvant sur le même plan ; former une couche isolante sur la surface supérieure de l'électrode de grille et la surface supérieure de la couche tampon ; former une couche de semi-conducteur en face de l'électrode de grille sur une surface supérieure de la couche isolante ; et former une ligne de données chevauchée partiellement par la couche de semi-conducteur sur la surface supérieure de la couche de semi-conducteur et/ou la surface supérieure de la couche isolante. L'invention concerne aussi un dispositif d'affichage comprenant la structure d'électrode de grille.
(ZH) 本申请涉及显示技术领域,公开了一种闸电极结构及其制造方法包括:在基板的一侧表面上形成缓冲层;在缓冲层上形成凹槽,凹槽贯穿缓冲层;在凹槽中形成闸电极,且闸电极的上表面与缓冲层的上表面位于同一平面上;在闸电极的上表面及缓冲层的上表面上形成绝缘层;在绝缘层的上表面形成与闸电极相对而置的半导体层;在半导体层的上表面和/或绝缘层的上表面上形成与半导体层部分交叠的数据线。还公开了一种显示装置,该显示装置包括了闸电极结构。
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)