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1. (WO2018157569) MEMORY CONTROL METHOD AND DEVICE

Pub. No.:    WO/2018/157569    International Application No.:    PCT/CN2017/099101
Publication Date: Sat Sep 08 01:59:59 CEST 2018 International Filing Date: Sat Aug 26 01:59:59 CEST 2017
IPC: G06F 13/16
Applicants: HUAWEI TECHNOLOGIES CO., LTD.
华为技术有限公司
Inventors: WANG, Zengqiang
王增强
YANG, Yifeng
杨谊峰
Title: MEMORY CONTROL METHOD AND DEVICE
Abstract:
A memory control method and device, for use in reducing wiring difficulty and improving signal quality when controlling SDRAMs belonging to one RANK to execute an access instruction. The method comprises: generating an access instruction for two SDRAMs according to instruction requirements (S601), the two SDRAMs being fixed to two sides of a single board in a mirrored manner; generating two chip select signals according to the access instruction (S602), a first chip select signal in the two chip select signals being used for enabling a first SDRAM in the two SDRAMs, and a second chip select signal in the two chip select signals being used for enabling a second SDRAM in the two SDRAMs; making at least one chip select signal in the two chip select signals valid according to mode parameters (S603), the mode parameters being used for indicating the validity of each chip select signal in the two chip select signals; and outputting the access instruction and the first chip select signal to the first SDRAM, and outputting the access instruction and the second chip select signal to the second SDRAM (S604).