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1. (WO2018143812) SEMICONDUCTOR DEVICE HAVING A JUNCTION
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Pub. No.: WO/2018/143812 International Application No.: PCT/NL2018/050080
Publication Date: 09.08.2018 International Filing Date: 06.02.2018
IPC:
H01L 29/861 (2006.01) ,H01L 21/329 (2006.01) ,H01L 29/40 (2006.01) ,H01L 29/417 (2006.01) ,H01L 29/06 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
86
controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated, or switched
861
Diodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
328
Multistep processes for the manufacture of devices of the bipolar type, e.g. diodes, transistors, thyristors
329
the devices comprising one or two electrodes, e.g. diodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40
Electrodes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40
Electrodes
41
characterised by their shape, relative sizes or dispositions
417
carrying the current to be rectified, amplified or switched
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
06
characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
Applicants:
LISZ B.V. [NL/LA]; Jessicagang 28 2719 CA Zoetermeer, NL
Inventors:
NANVER, Lis Karen; NL
Agent:
JANSEN, C.M.; V.O. Carnegieplein 5 2517 KJ Den Haag, NL
Priority Data:
201830906.02.2017NL
Title (EN) SEMICONDUCTOR DEVICE HAVING A JUNCTION
(FR) DISPOSITIF À SEMICONDUCTEUR AYANT UNE JONCTION
Abstract:
(EN) A first aspect provides a semiconductor device. The device comprises a semiconductor bulk having a top surface, a first bulk region having a first conductivity type extending from the top surface and a second bulk region having a second conductivity type opposite to the first conductivity type extending from the top surface and adjacent to the fist bulk area. The device further comprises a first terminal for providing an electrical contact to the first bulk region, a second terminal for providing an electrical contact to the second bulk region which second terminal is laterally spaced apart from the first terminal. On the top surface, a top layer is provided, the top layer comprising at least 50% and preferably at least 99% of a group III or group V material, the layer covering at least a boundary between the first bulk region and the second bulk region.
(FR) Un premier aspect de l'invention concerne un dispositif à semiconducteur. Le dispositif comprend un substrat semiconducteur ayant une surface supérieure, une première région de substrat ayant un premier type de conductivité s'étendant à partir de la surface supérieure et une seconde région de substrat ayant un second type de conductivité opposé au premier type de conductivité s'étendant à partir de la surface supérieure et adjacente à la première région de substrat. Le dispositif comprend en outre une première borne pour fournir un contact électrique à la première région de substrat, une seconde borne pour fournir un contact électrique à la seconde région de substrat, laquelle seconde borne est espacée latéralement de la première borne. Sur la surface supérieure, une couche supérieure est prévue, la couche supérieure comprenant au moins 50 % et de préférence au moins 99 % d'un matériau du groupe III ou du groupe V, la couche recouvrant au moins une limite entre la première région de substrat et la seconde région de substrat.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)