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1. (WO2018141867) POWER SEMICONDUCTOR MODULE WITH SHORT CIRCUIT FAILURE MODE
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/141867 International Application No.: PCT/EP2018/052559
Publication Date: 09.08.2018 International Filing Date: 01.02.2018
IPC:
H01L 23/051 (2006.01) ,H01L 23/535 (2006.01) ,H01L 23/62 (2006.01) ,H01L 25/07 (2006.01) ,H01L 29/16 (2006.01) ,H01L 23/00 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
02
Containers; Seals
04
characterised by the shape
043
the container being a hollow construction and having a conductive base as a mounting as well as a lead for the semiconductor body
051
another lead being formed by a cover plate parallel to the base plate, e.g. sandwich type
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
52
Arrangements for conducting electric current within the device in operation from one component to another
535
including internal interconnections, e.g. cross-under constructions
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
58
Structural electrical arrangements for semiconductor devices not otherwise provided for
62
Protection against overcurrent or overload, e.g. fuses, shunts
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
07
the devices being of a type provided for in group H01L29/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
12
characterised by the materials of which they are formed
16
including, apart from doping materials or other impurities, only elements of the fourth group of the Periodic System in uncombined form
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
Applicants: ABB SCHWEIZ AG[CH/CH]; Brown Boveri Strasse 6 5400 Baden, CH
Inventors: LIU, Chunlei; CH
SCHUDERER, Jürgen; CH
BREM, Franziska; CH
RAHIMO, Munaf; CH
STEIMER, Peter Karl; CH
DUGAL, Franc; CH
Agent: ABB PATENT ATTORNEYS; ABB Schweiz AG, CH-IP, Brown Boveri Strasse 6 5400 Baden, CH
Priority Data:
17154197.201.02.2017EP
Title (EN) POWER SEMICONDUCTOR MODULE WITH SHORT CIRCUIT FAILURE MODE
(FR) MODULE SEMICONDUCTEUR DE PUISSANCE À MODE DE DÉFAILLANCE DE COURT-CIRCUIT
Abstract:
(EN) A power semiconductor module (10) comprises a base plate (12); a Si chip (16a) comprising a Si substrate, the Si chip (16a) attached to the base plate (12); a first metal preform (22a) pressed with a first press pin (24a) against the Si chip (16a); a wide bandgap material chip (16b) comprising a wide bandgap substrate and a semiconductor switch (28b) provided in the wide bandgap substrate, the wide bandgap material chip (16b) attached to the base plate (12); and a second metal preform (22b) pressed with a second press pin (24b) against the wide bandgap material chip (16b); wherein the Si chip (16a) and the wide bandgap material chip (16b) are connected in parallel via the base plate (12) and via the first press pin (24a) and the second press pin (24b); wherein the first metal preform (22a) is adapted for forming a conducting path through the Si chip (16a), when heated by an overcurrent; and wherein the second metal preform (22b) is adapted for forming an temporary conducting path through the wide bandgap material chip (16b) or an open circuit, when heated by an overcurrent.
(FR) L'invention concerne un module semiconducteur de puissance (10) comprenant une plaque de base (12); une puce de Si (16a) comprenant un substrat de Si, la puce de Si (16a) étant fixée à la plaque de base (12); une première préforme métallique (22a) pressée avec une première broche de pression (24a) contre la puce de Si (16a); une puce de matériau à large bande interdite (16b) comprenant un substrat à large bande interdite et un commutateur à semiconducteur (28b) disposé sur le substrat à large bande interdite, la puce de matériau à large bande interdite (16b) étant fixée à la plaque de base (12); et une seconde préforme métallique (22b) pressée avec une seconde broche de pression (24b) contre la puce de matériau à large bande interdite (16b); la puce de Si (16a) et la puce de matériau à large bande interdite (16b) étant connectées en parallèle par l'intermédiaire de la plaque de base (12) et par l'intermédiaire de la première broche de pression (24a) et de la seconde broche de pression (24b); la première préforme métallique (22a) étant conçue pour former un trajet conducteur à travers la puce de Si (16a), lorsqu'elle est chauffée par une surintensité; et la seconde préforme métallique (22b) étant conçue pour former un trajet de conduction temporaire à travers la puce de matériau à large bande interdite (16b) ou un circuit ouvert, lorsqu'elle est chauffée par une surintensité.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)