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1. (WO2018140221) METHOD AND APPARATUS FOR AUTO-CALIBRATION OF DELAY SETTINGS OF MEMORY INTERFACES
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Pub. No.: WO/2018/140221 International Application No.: PCT/US2018/012808
Publication Date: 02.08.2018 International Filing Date: 08.01.2018
IPC:
G06F 13/16 (2006.01) ,G11C 7/22 (2006.01) ,G11C 11/4096 (2006.01) ,G11C 29/12 (2006.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
13
Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
14
Handling requests for interconnection or transfer
16
for access to memory bus
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
7
Arrangements for writing information into, or reading information out from, a digital store
22
Read-write (R-W) timing or clocking circuits; Read-write (R-W) control signal generators or management
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
11
Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21
using electric elements
34
using semiconductor devices
40
using transistors
401
forming cells needing refreshing or charge regeneration, i.e. dynamic cells
4063
Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
407
for memory cells of the field-effect type
409
Read-write (R-W) circuits
4096
Input/output (I/O) data management or control circuits, e.g. reading or writing circuits, I/O drivers, bit-line switches
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
29
Checking stores for correct operation; Testing stores during standby or offline operation
04
Detection or location of defective memory elements
08
Functional testing, e.g. testing during refresh, power-on self testing (POST) or distributed testing
12
Built-in arrangements for testing, e.g. built-in self testing (BIST)
Applicants:
IKANOS COMMUNICATIONS, INC. [US/US]; 47669 Fremont Blvd Fremont, CA 94538, US
Inventors:
PEDDU, Subash Babu; US
KAMASANI, Venkatramana; US
KALAKOTLA, Vijay Shikhamani; US
CUNZA, Daniel; US
Agent:
WORLEY, Eugene; US
Priority Data:
15/413,93624.01.2017US
Title (EN) METHOD AND APPARATUS FOR AUTO-CALIBRATION OF DELAY SETTINGS OF MEMORY INTERFACES
(FR) PROCÉDÉ ET APPAREIL D'AUTO-ÉTALONNAGE DE RÉGLAGES DE RETARD D'INTERFACES DE MÉMOIRE
Abstract:
(EN) In some aspects, a calibration method includes performing a write/read test for each one of multiple combinations of write/read delay settings, wherein each one of the multiple combinations of write/read delay settings includes one of a plurality of write delay settings of a first delay device and one of a plurality of read delay settings of a second delay device. The method also includes obtaining test results for the write/read tests, determining a pass region based on the test results, determining a center of the pass region, and selecting one of the multiple combinations of write/read settings based on the center of the pass region.
(FR) La présente invention concerne un procédé d'étalonnage comprenant la réalisation d'un test d'écriture/lecture pour chacune de multiples combinaisons de réglages de retard d'écriture/lecture, chacune des multiples combinaisons de réglages de retard d'écriture/lecture comprenant l'un d'une pluralité de réglages de retard d'écriture d'un premier dispositif de retard et l'un d'une pluralité de réglages de retard de lecture d'un second dispositif de retard. Le procédé consiste également à obtenir des résultats de test pour les tests d'écriture/lecture, à déterminer une région de passage sur la base des résultats de test, à déterminer un centre de la région de passage, et à sélectionner l'une des multiples combinaisons de réglages d'écriture/lecture sur la base du centre de la région de passage.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)