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1. (WO2018140102) INTEGRATED MEMORY ASSEMBLIES COMPRISING MULTIPLE MEMORY ARRAY DECKS

Pub. No.:    WO/2018/140102    International Application No.:    PCT/US2017/059022
Publication Date: Fri Aug 03 01:59:59 CEST 2018 International Filing Date: Tue Oct 31 00:59:59 CET 2017
IPC: G11C 5/02
H01L 27/24
Applicants: MICRON TECHNOLOGY, INC.
Inventors: DERNER, Scott, J.
INGALLS, Charles, L.
Title: INTEGRATED MEMORY ASSEMBLIES COMPRISING MULTIPLE MEMORY ARRAY DECKS
Abstract:
Some embodiments include an integrated memory assembly having a first memory array deck over a second memory array deck. A first series of conductive lines extends across the first memory array deck, and a second series of conductive lines extends across the second memory array deck. A first conductive line of the first series and a first conductive line of the second series are coupled with a first component through a first conductive path. A second conductive line of the first series and a second conductive line of the second series are coupled with a second component through a second conductive path. The first and second conductive lines of the first series extend through first isolation circuitry to the first and second conductive paths, respectively; and the first and second conductive lines of the second series extend through second isolation circuitry to the first and second conductive paths, respectively.