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1. (WO2018139670) MOUNTING DEVICE AND MOUNTING SYSTEM
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Pub. No.: WO/2018/139670 International Application No.: PCT/JP2018/002950
Publication Date: 02.08.2018 International Filing Date: 30.01.2018
IPC:
H01L 21/60 (2006.01) ,H01L 25/065 (2006.01) ,H01L 25/07 (2006.01) ,H01L 25/18 (2006.01) ,H05K 13/04 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50
Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
60
Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
065
the devices being of a type provided for in group H01L27/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03
all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04
the devices not having separate containers
07
the devices being of a type provided for in group H01L29/78
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25
Assemblies consisting of a plurality of individual semiconductor or other solid state devices
18
the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/-H01L51/160
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
13
Apparatus or processes specially adapted for manufacturing or adjusting assemblages of electric components
04
Mounting of components
Applicants:
株式会社新川 SHINKAWA LTD. [JP/JP]; 東京都武蔵村山市伊奈平2丁目51番地の1 51-1, Inadaira, 2-chome, Musashimurayama-shi, Tokyo 2088585, JP
Inventors:
中村 智宣 NAKAMURA Tomonori; JP
前田 徹 MAEDA Toru; JP
Agent:
特許業務法人YKI国際特許事務所 YKI PATENT ATTORNEYS; 東京都武蔵野市吉祥寺本町一丁目34番12号 1-34-12, Kichijoji-Honcho, Musashino-shi, Tokyo 1800004, JP
Priority Data:
2017-01475630.01.2017JP
Title (EN) MOUNTING DEVICE AND MOUNTING SYSTEM
(FR) DISPOSITIF DE MONTAGE ET SYSTÈME DE MONTAGE
(JA) 実装装置および実装システム
Abstract:
(EN) A mounting device for stacking and mounting two or more semiconductor chips at a plurality of locations on a substrate is provided with: a first mounting head for forming, at a plurality of locations on the substrate, temporarily stacked bodies in which two or more semiconductor chips are stacked in a temporarily press-attached state; and a second mounting head 126 for forming chip stacked bodies by sequentially finally press-attaching the temporarily stacked bodies formed at the plurality of locations. The second mounting head 126 is provided with: a press-attaching tool 130 for heating and pressing an upper surface of a temporarily stacked body of interest to thereby finally press-attach the two or more semiconductor chips of the temporarily stacked body at once; and one or more heat-dissipation tools 132 having a heat-dissipating body which, by coming into contact with the upper surface of another stacked body disposed around the temporarily stacked body of interest, dissipates heat from the other stacked body.
(FR) L'invention concerne un dispositif de montage pour empiler et monter au moins deux puces semiconductrices au niveau d'une pluralité d'emplacements sur un substrat comprenant : une première tête de montage pour former, en une pluralité d'emplacements sur le substrat, des corps empilés temporairement dans lesquels deux puces semiconductrices ou plus sont empilées temporairement dans un état de fixation par pression ; et une seconde tête de montage 126 pour former des corps empilés de puce en fixant par pression finalement de manière séquentielle les corps empilés temporairement formés au niveau de la pluralité d'emplacements. La seconde tête de montage comprend : un outil de fixation par pression 130 pour chauffer et presser une surface supérieure d'un corps empilé temporairement d'intérêt pour ainsi finalement fixer par pression les deux puces semiconductrices ou plus du corps empilé temporairement en une seule fois; et un ou plusieurs outils de dissipation de chaleur 132 ayant un corps de dissipation de chaleur qui, en entrant en contact avec la surface supérieure d'un autre corps empilé disposé autour du corps d'intérêt empilé temporairement, dissipe la chaleur à partir de l'autre corps empilé.
(JA) 基板上の複数箇所に、2以上の半導体チップを積層して実装する実装装置は、前記基板上の複数箇所に、2以上の半導体チップを仮圧着状態で積層した仮積層体を形成する第一実装ヘッドと、前記複数箇所に形成された前記仮積層体を順番に本圧着してチップ積層体を形成する第二実装ヘッド126と、を備え、前記第二実装ヘッド126は、対象の仮積層体の上面を加熱しながら加圧することで、当該仮積層体を構成する2以上の半導体チップを一括で本圧着する圧着ツール130と、前記対象の仮積層体の周辺に位置する他の積層体の上面に接触することで前記他の積層体を放熱する放熱体を有する1以上の放熱ツール132と、を備える。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)