Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO2018139427) POLYMER FILM LAMINATED SUBSTRATE AND METHOD FOR PRODUCING FLEXIBLE ELECTRONIC DEVICE
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/139427 International Application No.: PCT/JP2018/001901
Publication Date: 02.08.2018 International Filing Date: 23.01.2018
IPC:
B32B 7/06 (2006.01) ,B32B 9/00 (2006.01) ,B32B 27/00 (2006.01) ,B32B 27/34 (2006.01) ,H01L 21/02 (2006.01) ,H01L 21/336 (2006.01) ,H01L 23/12 (2006.01) ,H01L 27/12 (2006.01) ,H01L 29/786 (2006.01)
B PERFORMING OPERATIONS; TRANSPORTING
32
LAYERED PRODUCTS
B
LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
7
Layered products characterised by the relation between layers, i.e. products essentially comprising layers having different physical properties or products characterised by the interconnection of layers
04
characterised by the connection of layers
06
permitting easy separation
B PERFORMING OPERATIONS; TRANSPORTING
32
LAYERED PRODUCTS
B
LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
9
Layered products essentially comprising a particular substance not covered by groups B32B11/-B32B29/137
B PERFORMING OPERATIONS; TRANSPORTING
32
LAYERED PRODUCTS
B
LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
27
Layered products essentially comprising synthetic resin
B PERFORMING OPERATIONS; TRANSPORTING
32
LAYERED PRODUCTS
B
LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT OR NON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM
27
Layered products essentially comprising synthetic resin
34
comprising polyamides
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
12
Mountings, e.g. non-detachable insulating substrates
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12
the substrate being other than a semiconductor body, e.g. an insulating body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
786
Thin-film transistors
Applicants:
東洋紡株式会社 TOYOBO CO., LTD. [JP/JP]; 大阪府大阪市北区堂島浜二丁目2番8号 2-8, Dojima Hama 2-chome, Kita-ku, Osaka-shi, Osaka 5308230, JP
Inventors:
奥山 哲雄 OKUYAMA Tetsuo; JP
渡辺 直樹 WATANABE Naoki; JP
土屋 俊之 TSUCHIYA Toshiyuki; JP
山下 全広 YAMASHITA Yoshihiro; JP
▲徳▼田 桂也 TOKUDA Kaya; JP
Priority Data:
2017-01099125.01.2017JP
2017-01099225.01.2017JP
2017-01099325.01.2017JP
Title (EN) POLYMER FILM LAMINATED SUBSTRATE AND METHOD FOR PRODUCING FLEXIBLE ELECTRONIC DEVICE
(FR) SUBSTRAT STRATIFIÉ DE FILM POLYMÈRE ET PROCÉDÉ DE PRODUCTION DE DISPOSITIF ÉLECTRONIQUE FLEXIBLE
(JA) 高分子フィルム積層基板およびフレキシブル電子デバイスの製造方法
Abstract:
(EN) [Problem] To provide a polyimide film laminated substrate wherein a polyimide film is able to be stably separated from an inorganic substrate by means of a small and constant force even after a heat treatment that is performed at a temperature more than 500°C. [Solution] According to the present invention, an inorganic substrate wherein a thin film of aluminum oxide, a thin film of a composite oxide of aluminum and silicon, or an alloy thin film of molybdenum and/or tungsten is continuously or discontinuously formed on at least a part of one surface of the inorganic substrate is subjected to a silane coupling agent treatment; and a polyimide film layer is subsequently laminated on a silane coupling agent layer. With respect to the thus-obtained laminate, a portion where the aluminum oxide thin film layer is present serves as an easily releasable layer, and a portion where the aluminum oxide thin film layer is absent serves as a reliably bonded part; and the bonding strength of the easily releasable part does not change and is stably maintained at a low value even after a heat treatment at 500°C or higher.
(FR) Le problème décrit par la présente invention est de fournir un substrat stratifié de film de polyimide dans lequel un film de polyimide peut être séparé de manière stable d'un substrat inorganique au moyen d'une force faible et constante même après un traitement thermique qui est réalisé à une température supérieure à 500 °C. La solution selon la présente invention porte sur un substrat inorganique dans lequel un film mince d'oxyde d'aluminium, un film mince d'un oxyde composite d'aluminium et de silicium ou un film mince d'alliage de molybdène et/ou de tungstène est formé en continu ou de manière discontinue sur au moins une partie d'une surface du substrat inorganique est soumis à un traitement d'agent de couplage au silane ; et une couche de film de polyimide est ensuite stratifiée sur une couche d'agent de couplage au silane. Par rapport au stratifié ainsi obtenu, une partie où la couche de film mince d'oxyde d'aluminium est présente sert de couche facilement libérable et une partie où la couche de film mince d'oxyde d'aluminium est absente sert de partie liée de manière fiable ; et la force de liaison de la partie facilement libérable ne change pas et est maintenue de manière stable à une valeur faible même après un traitement thermique à 500 °C ou plus.
(JA) 【課題】 ポリイミドフィルムを無機基板から剥離する際に、500℃を越える温度での熱処理を行った後でも、安定し、低く、かつ一定の力にて剥離することが可能となるポリイミドフィルム積層基板を提供する。 【解決手段】 無機基板の少なくとも片面の一部にアルミニウム酸化物の薄膜、あるいはアルミニウムとシリコンの複合酸化物の薄膜、あるいはモリブデンないしタングステン、またはモリブデンとタングステンの合金薄膜が連続又は不連続に形成された無機基板に、シランカップリング剤処理を行い、さらにシランカップリング剤層の上にポリイミドフィルム層を積層する。得られた積層体の、アルミニウム酸化物薄膜層がある部分が易剥離層、無い部分が良好接着部として機能し、500℃以上の熱処理を経た後でも易剥離部の接着強度が変化せず、低い値を安定して維持する。
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)