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1. (WO2018138817) SEMICONDUCTOR DEVICE MANUFACTURING METHOD

Pub. No.:    WO/2018/138817    International Application No.:    PCT/JP2017/002623
Publication Date: Fri Aug 03 01:59:59 CEST 2018 International Filing Date: Fri Jan 27 00:59:59 CET 2017
IPC: H01L 29/78
H01L 21/336
H01L 21/768
H01L 29/12
H01L 29/423
H01L 29/49
Applicants: MITSUBISHI ELECTRIC CORPORATION
三菱電機株式会社
Inventors: MURAKAMI Takeshi
村上 剛史
Title: SEMICONDUCTOR DEVICE MANUFACTURING METHOD
Abstract:
The present invention addresses the problem of suppressing, at the time of forming a gate contact region, exposure of a gate conductive film in a unit cell section, said gate conductive film having been covered with an interlayer insulating film. Disclosed is a semiconductor device manufacturing method wherein: a gate conductive film (2a) in contact with a gate oxide film in a unit cell section (11) is formed; gate wiring (3a) in contact with the gate oxide film in a termination region (12) is formed; a first insulating film (103d) is formed on the upper surface of the gate wiring in the termination region; a thermally oxidized film (102d) is formed on the upper surface of the gate conductive film by thermally oxidizing, using the first insulating film as a mask, the upper surface of the gate conductive film in the unit cell section; and second insulating films (102b, 103b) covering the first insulating film and the thermally oxidized film are formed.