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1. (WO2018129460) APPARATUS AND METHODS FOR TESTING SEMICONDUCTOR DEVICES

Pub. No.:    WO/2018/129460    International Application No.:    PCT/US2018/012804
Publication Date: Fri Jul 13 01:59:59 CEST 2018 International Filing Date: Tue Jan 09 00:59:59 CET 2018
IPC: H01L 21/67
G01R 31/00
Applicants: TESTMETRIX, INC.
Inventors: COJOCNEANU, Christian, O.
SCURTU, Lucian
Title: APPARATUS AND METHODS FOR TESTING SEMICONDUCTOR DEVICES
Abstract:
A multisite parallel wafer tester that has an array of stationary wafer test sites; a single mobile wafer handling and alignment carriage that holds a wafer handling robot, a wafer rotation pre-alignment assembly, a wafer alignment assembly, a wafer front opening unified pod (FOUP), and a wafer camera assembly; and a robot that moves the wafer handling and alignment carriage to and from each test site. Each test site contains a wafer probe card assembly and a floating chuck. Wafers are loaded from a front opening FOUP into a wafer buffer FOUP from which wafers are retrieved by the wafer handling and alignment assembly. The robot positions the wafer handling and alignment carriage and the associated wafer handling robot, the wafer rotation pre-alignment assembly, the wafer alignment assembly, the wafer FOUP, and the wafer camera assembly in front of and inside a given test site and aligns the wafer to be tested with the probe card inside the test site.