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1. (WO2018128758) INTEGRATED MEMORY, INTEGRATED ASSEMBLIES, AND METHODS OF FORMING MEMORY ARRAYS

Pub. No.:    WO/2018/128758    International Application No.:    PCT/US2017/065993
Publication Date: Fri Jul 13 01:59:59 CEST 2018 International Filing Date: Thu Dec 14 00:59:59 CET 2017
IPC: H01L 27/108
Applicants: MICRON TECHNOLOGY, INC.
Inventors: RAMASWAMY, Durai, Vishak Nirmal
Title: INTEGRATED MEMORY, INTEGRATED ASSEMBLIES, AND METHODS OF FORMING MEMORY ARRAYS
Abstract:
Some embodiments include an integrated memory having an array of capacitors. The array has edges. The capacitors along the edges are edge capacitors, and the other capacitors are internal capacitors. The edge capacitors have inner edges facing toward the internal capacitors, and have outer edges in opposing relation to the inner edges. An insulative beam extends laterally between the capacitors. The insulative beam is along upper regions of the capacitors. First void regions are under the insulative beam, along lower regions of the internal capacitors, and along the inner edges of the edge capacitors. Peripheral extensions of the insulative beam extend laterally outward of the edge capacitors, and second void regions are under the peripheral extensions and along the outer edges of the edge capacitors. Some embodiments included integrated assemblies having two or more memory array decks stacked on atop another. Some embodiments include methods of forming memory arrays.