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1. (WO2018127948) COMPUTER SYSTEM

Pub. No.:    WO/2018/127948    International Application No.:    PCT/JP2017/000054
Publication Date: Fri Jul 13 01:59:59 CEST 2018 International Filing Date: Thu Jan 05 00:59:59 CET 2017
IPC: G06F 12/02
G06F 11/20
G06F 12/00
Applicants: HITACHI, LTD.
Inventors: SHIMADA, Akio
島田 明男
JOHRI, Abhishek
ジョーリ アビシェク
早坂 光雄
Provided is a computer system that includes a processor and a non-volatile random-access memory. The processor: secures a first heap for a program to use a memory region of the non-volatile random-access memory; executes allocation and release of use regions in the first heap; executes processing to consolidate separated use regions into a single continuous region, in the first heap; updates first management information indicating the relationship between a use region in the first heap and a key which identifies the memory region allocated to the use region, such update being in accordance with the allocation, the release, and the processing; and searches the first heap for the address of a target memory region by using the key for the target memory region in the first management information.