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1. (WO2018126510) ARRAY SUBSTRATE AND DISPLAY

Pub. No.:    WO/2018/126510    International Application No.:    PCT/CN2017/073344
Publication Date: Fri Jul 13 01:59:59 CEST 2018 International Filing Date: Tue Feb 14 00:59:59 CET 2017
IPC: G02F 1/1362
Applicants: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
深圳市华星光电技术有限公司
Inventors: AN, Liyang
安立扬
Title: ARRAY SUBSTRATE AND DISPLAY
Abstract:
An array substrate and a display are provided. The array substrate comprises multiple gate lines (Gate(n)), multiple data lines (Data(n)), and multiple pixel units. Each pixel unit is connected to the N-th gate line (Gate(n)) and the (N+1)-th gate line (Gate(n+1)). When the N-th gate line (Gate(n)) is enabled, the data line (Data(n)) charges a main pixel area (100), a first sub pixel area (200), and a second sub pixel area (300). When the (N+1)-th gate line (Gate(n+1)) is enabled, the capacitive coupling effect is achieved inside the main pixel area (100), the first sub pixel area (200), and the second sub pixel area (300), causing electric potentials of the main pixel area (100), the first sub pixel area (200), and the second sub pixel area (300) to be different from each other, and thus improving the display effect at large viewing angles.