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1. (WO2018125499) CROSSTALK CANCELLATION TRANSMISSION BRIDGE
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Pub. No.: WO/2018/125499 International Application No.: PCT/US2017/063804
Publication Date: 05.07.2018 International Filing Date: 29.11.2017
IPC:
G11C 5/04 (2006.01) ,H05K 1/18 (2006.01) ,H01R 12/71 (2011.01)
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
5
Details of stores covered by group G11C11/63
02
Disposition of storage elements, e.g. in the form of a matrix array
04
Supports for storage elements; Mounting or fixing of storage elements on such supports
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1
Printed circuits
18
Printed circuits structurally associated with non-printed electric components
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
R
ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
12
Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards (PCBs), flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
70
Coupling devices
71
for rigid printing circuits or like structures
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95054, US
Inventors:
MCCALL, James A.; US
ZHANG, Zhichao; US
LI, Qin; US
LI, Xiang; US
DREW, John R.; US
Agent:
RAYNES, Alan S.; US
Priority Data:
15/396,26830.12.2016US
Title (EN) CROSSTALK CANCELLATION TRANSMISSION BRIDGE
(FR) PONT DE TRANSMISSION À ANNULATION DE DIAPHONIE
Abstract:
(EN) Devices include a connecting card that may be used in a memory connector. The connecting card may include a substrate including a first substrate region and a second substrate region, a plurality of adjacent signal pathways extending from the first substrate region to the second substrate region, and a capacitor positioned between each of the adjacent signal pathways. Other embodiments are described and claimed.
(FR) L'invention concerne des dispositifs comprenant une carte de liaison qui peut être utilisée dans un connecteur de mémoire. La carte de liaison peut comprendre un substrat comprenant une première région de substrat et une seconde région de substrat, une pluralité de voies de signal adjacentes s'étendant de la première région de substrat à la seconde région de substrat, et un condensateur positionné entre chacune des voies de signal adjacentes. L'invention concerne également d'autres modes de réalisation.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)