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1. (WO2018125238) SYSTEMS, METHODS, AND APPARATUS FOR SEMICONDUCTOR MEMORY WITH POROUS ACTIVE LAYER

Pub. No.:    WO/2018/125238    International Application No.:    PCT/US2016/069619
Publication Date: Fri Jul 06 01:59:59 CEST 2018 International Filing Date: Sat Dec 31 00:59:59 CET 2016
IPC: H01L 45/00
Applicants: INTEL CORPORATION
Inventors: BIELEFELD, Jeffery D.
KING, Sean W.
KARPOV, Elijah V.
CLARKE, James S.
Title: SYSTEMS, METHODS, AND APPARATUS FOR SEMICONDUCTOR MEMORY WITH POROUS ACTIVE LAYER
Abstract:
In various embodiments, low-density dielectrics (for example, interlayer dielectrics, ILDs) can be used as the active layer in conduction bridging random access memory (CBRAM) devices. Further, such low-density dielectrics may permit a predetermined level of metal migration in the active layer of the device. In one embodiment, the density and/or porosity of the active layer can be adjusted to affect the performance of the device. In various embodiments, the disclosure describes the use of such porous and/or low-density dielectric layers (for example, silicon oxycarbide, SiOC, silicon carbide, SiC, silicon carbon nitride, SiCN, silicon oxycarbonitride, SiOCN, silicon nitride, SiNx, and the like) as the solid electrolyte comprising the active layer in CBRAM devices. In an embodiment, the use of these porous and/or low-density backend dielectric materials as the active layer can permit filament formation voltages less than approximately 2 V.