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1. (WO2018125209) IMPROVING MECHANICAL AND THERMAL RELIABILITY IN VARYING FORM FACTORS
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Pub. No.: WO/2018/125209 International Application No.: PCT/US2016/069497
Publication Date: 05.07.2018 International Filing Date: 30.12.2016
IPC:
H01L 23/482 (2006.01) ,H01L 23/488 (2006.01) ,H01L 23/00 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
48
Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
482
consisting of lead-in layers inseparably applied to the semiconductor body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
48
Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
488
consisting of soldered or bonded constructions
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
Applicants:
INTEL CORPORATION [US/US]; 2200 Mission College Boulevard Santa Clara, California 95054, US
Inventors:
STRONG, Veronica A; US
OSTER, Sasha N.; US
LIFF, Shawna M.; US
Agent:
PERDOK, Monique, M.; US
Priority Data:
Title (EN) IMPROVING MECHANICAL AND THERMAL RELIABILITY IN VARYING FORM FACTORS
(FR) AMÉLIORATION DE LA FIABILITÉ MÉCANIQUE ET THERMIQUE DANS DES FACTEURS DE FORME VARIABLE
Abstract:
(EN) A system for packaging integrated circuits includes an integrated circuit having one or more integrated circuit terminals. The system for packaging integrated circuits also includes a substrate having one or more substrate terminals. The system for packaging integrated circuits further includes an electrically conductive adhesive in communication with the integrated circuit terminals and the substrate terminals. The electrically conductive adhesive establishes an electrical connection between each of the one or more integrated circuit terminals and the one or more substrate terminals. The electrical connection between each of the one or more integrated circuit terminals and the one or more substrate terminals are enclosed in a dielectric. The system for packaging integrated circuits includes a second adhesive in communication with the integrated circuit and the substrate, wherein the second adhesive couples the integrated circuit and substrate together.
(FR) La présente invention concerne un système de conditionnement de circuits intégrés qui comprend un circuit intégré ayant une ou plusieurs bornes de circuit intégré. Le système de conditionnement de circuits intégrés comprend également un substrat ayant une ou plusieurs bornes de substrat. Le système de conditionnement de circuits intégrés comprend en outre un adhésif électriquement conducteur en communication avec les bornes de circuit intégré et les bornes de substrat. L'adhésif électroconducteur établit une connexion électrique entre chacune desdites bornes de circuit intégré et desdites bornes de substrat. La connexion électrique entre chacune desdites bornes de circuit intégré et desdites bornes de substrat est enfermée dans un diélectrique. Le système de conditionnement de circuits intégrés comprend un second adhésif en communication avec le circuit intégré et le substrat, le second adhésif couplant ensemble le circuit intégré et le substrat.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)