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1. WO2018125162 - SEMICONDUCTOR PACKAGE HAVING PASSIVE SUPPORT WAFER

Publication Number WO/2018/125162
Publication Date 05.07.2018
International Application No. PCT/US2016/069308
International Filing Date 29.12.2016
IPC
H01L 23/00 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
H01L 21/56 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
56Encapsulations, e.g. encapsulating layers, coatings
H01L 23/12 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
12Mountings, e.g. non-detachable insulating substrates
H01L 23/367 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
34Arrangements for cooling, heating, ventilating or temperature compensation
36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heat sinks
367Cooling facilitated by shape of device
H01L 21/768 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71Manufacture of specific parts of devices defined in group H01L21/7086
768Applying interconnections to be used for carrying current between separate components within a device
CPC
H01L 21/56
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
H01L 21/76898
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76898formed through a semiconductor substrate
H01L 21/8221
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8221Three dimensional integrated circuits stacked in different levels
H01L 2224/16225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
15Structure, shape, material or disposition of the bump connectors after the connecting process
16of an individual bump connector
161Disposition
16151the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
16221the body and the item being stacked
16225the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L 2225/06513
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2225Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00
04the devices not having separate containers
065the devices being of a type provided for in group H01L27/00
06503Stacked arrangements of devices
06513Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
H01L 2225/06541
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2225Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00
04the devices not having separate containers
065the devices being of a type provided for in group H01L27/00
06503Stacked arrangements of devices
06541Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
Applicants
  • INTEL CORPORATION [US]/[US]
Inventors
  • MALLIK, Debendra
  • RAORANE, Digvijay A.
  • MAHAJAN, Ravindranath Vithal
  • MODI, Mitul Bharat
Agents
  • BRASK, Justin, K.
Priority Data
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) SEMICONDUCTOR PACKAGE HAVING PASSIVE SUPPORT WAFER
(FR) BOÎTIER DE SEMI-CONDUCTEUR COMPRENANT UNE TRANCHE DE SUPPORT PASSIVE
Abstract
(EN)
Semiconductor packages including passive support wafers, and methods of fabricating such semiconductor packages, are described. In an example, a semiconductor package includes a passive support wafer mounted on several active dies. The active dies may be attached to an active die wafer, and the passive support wafer may include a monolithic form to stabilize the active dies and active die wafer during processing and use. Furthermore, the passive support wafer may include a monolith of non-polymeric material to transfer and uniformly distribute heat generated by the active dies.
(FR)
L'invention concerne des boîtiers de semi-conducteur comprenant des tranches de support passives, ainsi que des procédés de fabrication de tels boîtiers de semi-conducteur. Dans un exemple, un boîtier de semi-conducteur comprend une tranche de support passive montée sur plusieurs puces actives. Les puces actives peuvent être fixées sur une tranche de puces actives, et la tranche de support passive peut comprendre une forme monolithique pour stabiliser les puces actives et la tranche de puces actives pendant le traitement et l'utilisation. En outre, la tranche de support passive peut comprendre un monolithe de matériau non polymère pour le transfert et la répartition uniforme de la chaleur générée par les puces actives.
Also published as
Latest bibliographic data on file with the International Bureau