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1. (WO2018123708) LEAD FRAME MEMBER AND METHOD FOR MANUFACTURING SAME, AND SEMICONDUCTOR PACKAGE
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Pub. No.: WO/2018/123708 International Application No.: PCT/JP2017/045451
Publication Date: 05.07.2018 International Filing Date: 19.12.2017
IPC:
H01L 23/50 (2006.01) ,C25D 5/10 (2006.01) ,C25D 5/16 (2006.01) ,C25D 7/00 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23
Details of semiconductor or other solid state devices
48
Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
50
for integrated circuit devices
C CHEMISTRY; METALLURGY
25
ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
D
PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; JOINING WORKPIECES BY ELECTROLYSIS; APPARATUS THEREFOR
5
Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
10
Electroplating with more than one layer of the same or of different metals
C CHEMISTRY; METALLURGY
25
ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
D
PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; JOINING WORKPIECES BY ELECTROLYSIS; APPARATUS THEREFOR
5
Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
16
Electroplating with layers of varying thickness
C CHEMISTRY; METALLURGY
25
ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
D
PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; JOINING WORKPIECES BY ELECTROLYSIS; APPARATUS THEREFOR
7
Electroplating characterised by the article coated
Applicants:
古河電気工業株式会社 FURUKAWA ELECTRIC CO., LTD. [JP/JP]; 東京都千代田区丸の内二丁目2番3号 2-3, Marunouchi 2-chome, Chiyoda-ku, Tokyo 1008322, JP
古河精密金属工業株式会社 FURUKAWA PRECISION ENGINEERING CO.,LTD. [JP/JP]; 栃木県日光市清滝新細尾町528番5号 528-5, Kiyotakishinhosoomachi, Nikko-shi, Tochigi 3211448, JP
Inventors:
中津川 達也 NAKATSUGAWA Tatsuya; JP
小林 良聡 KOBAYASHI Yoshiaki; JP
橋本 真 HASHIMOTO Makoto; JP
柴田 邦夫 SHIBATA Kunio; JP
Agent:
アインゼル・フェリックス=ラインハルト EINSEL Felix-Reinhard; JP
前川 純一 MAEKAWA Junichi; JP
二宮 浩康 NINOMIYA Hiroyasu; JP
上島 類 UESHIMA Rui; JP
住吉 秀一 SUMIYOSHI Shuichi; JP
Priority Data:
2016-25396827.12.2016JP
Title (EN) LEAD FRAME MEMBER AND METHOD FOR MANUFACTURING SAME, AND SEMICONDUCTOR PACKAGE
(FR) ÉLÉMENT DE GRILLE DE CONNEXION ET SON PROCÉDÉ DE FABRICATION ET BOÎTIER À SEMI-CONDUCTEUR
(JA) リードフレーム材およびその製造方法ならびに半導体パッケージ
Abstract:
(EN) A lead frame member (10) is provided with an electrically conductive substrate (1) and a roughened film (3) which includes at least one roughened layer (2) formed of a plurality of roughened particle projections (4) on at least one side of the electrically conductive substrate (1), either directly or with an intermediate layer interposed therebetween. The projections (4) have a shape such that a maximum width measured at a thickness-direction cross section of the roughened film (3) is 1 to 5 times a minimum width measured at a lower portion positioned on the electrically conductive substrate (1) side below the position at which the maximum width is measured.
(FR) Cette invention concerne un élément de grille de connexion (10), comprenant un substrat électriquement conducteur (1) et un film rugueux (3) qui comprend au moins une couche rugueuse (2) formée d'une pluralité de saillies de particules rugueuses (4) sur au moins un côté du substrat électriquement conducteur (1), soit directement, soit avec une couche intermédiaire interposée entre ceux-ci. Les saillies (4) ont une forme telle qu'une largeur maximale mesurée au niveau d'une section transversale dans le sens de l'épaisseur du film rugueux (3) est de 1 à 5 fois une largeur minimale mesurée au niveau d'une partie inférieure positionnée sur le côté du substrat électriquement conducteur (1) en dessous de la position à laquelle la largeur maximale est mesurée.
(JA) 導電性基体(1)と、該導電性基体(1)の少なくとも片面上に、直接または中間層を介して複数の粗化粒子の突起物(4)で形成された少なくとも1層の粗化層(2)を含む粗化皮膜(3)と、を備え、前記突起物(4)は、前記粗化皮膜(3)の厚さ方向断面で測定したときの最大幅が、該最大幅の測定位置よりも前記導電性基体(1)側に位置する下側部分で測定したときの最小幅に対して1~5倍となる形状を有するリードフレーム材(10)。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)