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1. (WO2018123351) CARRIER FOR DUAL-SURFACE POLISHING DEVICE AND DUAL-SURFACE POLISHING DEVICE USING SAME, AND DUAL-SURFACE POLISHING METHOD
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Pub. No.: WO/2018/123351 International Application No.: PCT/JP2017/041735
Publication Date: 05.07.2018 International Filing Date: 21.11.2017
IPC:
H01L 21/304 (2006.01) ,B24B 37/08 (2012.01) ,B24B 37/28 (2012.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
302
to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
304
Mechanical treatment, e.g. grinding, polishing, cutting
B PERFORMING OPERATIONS; TRANSPORTING
24
GRINDING; POLISHING
B
MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
37
Lapping machines or devices; Accessories
04
designed for working plane surfaces
07
characterised by the movement of the work or lapping tool
08
for double side lapping
B PERFORMING OPERATIONS; TRANSPORTING
24
GRINDING; POLISHING
B
MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
37
Lapping machines or devices; Accessories
27
Work carriers
28
for double side lapping of plane surfaces
Applicants:
信越半導体株式会社 SHIN-ETSU HANDOTAI CO.,LTD. [JP/JP]; 東京都千代田区大手町二丁目2番1号 2-1, Ohtemachi 2-chome, Chiyoda-ku, Tokyo 1000004, JP
Inventors:
浅井 一将 ASAI Kazumasa; JP
高野 智史 TAKANO Tomofumi; JP
古川 大輔 FURUKAWA Daisuke; JP
轟 翔 TODOROKI Sho; JP
木田 隆広 KIDA Takahiro; JP
Agent:
好宮 幹夫 YOSHIMIYA Mikio; JP
小林 俊弘 KOBAYASHI Toshihiro; JP
Priority Data:
2016-25152326.12.2016JP
Title (EN) CARRIER FOR DUAL-SURFACE POLISHING DEVICE AND DUAL-SURFACE POLISHING DEVICE USING SAME, AND DUAL-SURFACE POLISHING METHOD
(FR) SUPPORT POUR DISPOSITIF DE POLISSAGE À DOUBLE SURFACE ET DISPOSITIF DE POLISSAGE À DOUBLE SURFACE L'UTILISANT, ET PROCÉDÉ DE POLISSAGE À DOUBLE SURFACE
(JA) 両面研磨装置用キャリア及びこれを用いた両面研磨装置並びに両面研磨方法
Abstract:
(EN) The present invention provides a carrier for a dual-surface polishing device in which, in a dual-surface polishing device, one or more holding holes, which are disposed between upper and lower platens to which a polishing cloth is attached, for holding a semiconductor wafer sandwiched between the upper and lower platens during polishing are formed. The carrier for a dual-surface polishing device is characterized in that the surface of the carrier has a region covered with a DLC film and a region not covered with the DLC film, and on the upper surface and the lower surface of the carrier, a region of 30% or less of the area of one of the surfaces of the carrier, from the tooth bottom of a gear on the outer periphery of the carrier to the inside thereof, is covered with the DLC film. As a result of the feature of this carrier, it is possible to provide: a carrier for a dual-surface polishing device that is capable of preventing deterioration of a wafer shape while maintaining improvement on wafer surface defects in dual-surface polishing of a semiconductor wafer, and a dual-surface polishing device using the carrier; and a dual-surface polishing method.
(FR) La présente invention concerne un support pour un dispositif de polissage à double surface dans lequel, dans un dispositif de polissage à double surface, un ou plusieurs trous de maintien, qui sont disposés entre des plateaux supérieur et inférieur auxquels est fixé un tissu de polissage, pour maintenir une tranche de semiconducteur prise en sandwich entre les plateaux supérieur et inférieur pendant le polissage. Le support pour un dispositif de polissage à double surface est caractérisé en ce que la surface du support a une région recouverte d'un film DLC et une région non recouverte du film DLC, et sur la surface supérieure et la surface inférieure du support, une région de 30 % ou moins de la surface de l'une des surfaces du support, depuis le fond de dent d'un engrenage sur la périphérie externe du support vers l'intérieur de celui-ci, est recouverte du film DLC. Grâce à la caractéristique de ce support, il est possible de fournir: un support pour un dispositif de polissage à double surface qui est capable d'empêcher la détérioration d'une forme de tranche tout en maintenant une amélioration sur des défauts de surface de tranche dans le polissage à double surface d'une tranche de semiconducteur, et un dispositif de polissage à double surface utilisant le support; et un procédé de polissage à double surface.
(JA) 本発明は、両面研磨装置において、研磨布が貼付された上下定盤の間に配設され、研磨の際に前記上下定盤の間に挟まれた半導体ウェーハを保持するための保持孔が一つ以上形成された両面研磨装置用キャリアであって、該キャリアの表面は、DLC膜で覆われた領域と、前記DLC膜で覆われていない領域とを有し、前記キャリアの上面と下面のそれぞれの面において、前記キャリアの外周におけるギアの歯底から内側へ、前記キャリアの一方の面の面積の30%以下の領域が前記DLC膜で覆われたものであることを特徴とする両面研磨装置用キャリアである。これにより、半導体ウェーハの両面研磨の際に、ウェーハ表面不良の改善を維持しつつ、ウェーハ形状の悪化を防止することができる両面研磨装置用キャリア、及びこれを用いた両面研磨装置並びに両面研磨方法が提供される。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)