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1. (WO2018123347) EPITAXIAL SILICON WAFER PRODUCTION METHOD
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Pub. No.: WO/2018/123347 International Application No.: PCT/JP2017/041680
Publication Date: 05.07.2018 International Filing Date: 20.11.2017
IPC:
H01L 21/205 (2006.01) ,C23C 16/24 (2006.01) ,C23C 16/44 (2006.01) ,C23C 16/52 (2006.01) ,H01L 21/20 (2006.01) ,H01L 21/304 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
20
Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
205
using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
C CHEMISTRY; METALLURGY
23
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
C
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
16
Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes
22
characterised by the deposition of inorganic material, other than metallic material
24
Deposition of silicon only
C CHEMISTRY; METALLURGY
23
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
C
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
16
Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes
44
characterised by the method of coating
C CHEMISTRY; METALLURGY
23
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
C
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
16
Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes
44
characterised by the method of coating
52
Controlling or regulating the coating process
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
20
Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
302
to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
304
Mechanical treatment, e.g. grinding, polishing, cutting
Applicants:
株式会社SUMCO SUMCO CORPORATION [JP/JP]; 東京都港区芝浦一丁目2番1号 2-1, Shibaura 1-chome, Minato-ku Tokyo 1058634, JP
Inventors:
辻 雅之 TSUJI Masayuki; JP
中村 元宜 NAKAMURA Motonori; JP
Agent:
杉村 憲司 SUGIMURA Kenji; JP
Priority Data:
2016-25106626.12.2016JP
Title (EN) EPITAXIAL SILICON WAFER PRODUCTION METHOD
(FR) PROCÉDÉ DE PRODUCTION DE PLAQUETTES DE SILICIUM ÉPITAXIQUES
(JA) エピタキシャルシリコンウェーハの製造方法
Abstract:
(EN) The present invention provides an epitaxial silicon wafer production method which provides excellent productivity while being capable of preventing generation of rear-surface fogging without requiring cleaning of a process chamber each time a single-wafer type epitaxial growth treatment is performed on multiple silicon wafers. The epitaxial silicon wafer production method according to the present invention comprises a transport-in step for a silicon wafer, a silicon epitaxial layer formation step, a transport-out step for the silicon wafer, and a cleaning step, wherein: the cleaning step is performed before and after a series of growth processes conducted by the transport-in step, the silicon epitaxial layer formation step, and the transport-out step is repeated a prescribed number of times; correspondence relationship between the total number of times that replacement of nitrogen gas within a transfer chamber is performed and the maximum number of times that processing count for the series of growth processes is performed, is preliminarily determined; and the prescribed number of times the series of growth processes is to be repeated is configured to be within the maximum number of processing count.
(FR) La présente invention concerne un procédé de production de plaquettes de silicium épitaxiques qui assure une excellente productivité tout en pouvant empêcher la génération de voilage de surface arrière sans nécessiter de nettoyage d’une chambre de traitement chaque fois qu’un traitement de croissance épitaxique de type à plaquette seule est mis en œuvre sur plusieurs plaquettes de silicium. Le procédé de production de plaquettes de silicium épitaxiques selon la présente invention consiste en une étape de transport d’introduction pour une plaquette de silicium, en une étape de formation de couche épitaxique de silicium, en une étape de transport de sortie pour la plaquette de silicium, et en une étape de nettoyage : l’étape de nettoyage étant appliquée avant et après une série de processus de croissance mis en œuvre lors de l’étape de transport d’introduction, l’étape de formation de couche épitaxique de silicium, et l’étape de transport de sortie étant répétées un nombre prédéfini de fois ; une relation de correspondance entre le nombre total de fois où le remplacement d’azote gazeux dans une chambre de transfert est effectué et le nombre maximal de fois où le compte de traitement pour la série de processus de croissance est effectué, étant déterminée de manière préliminaire ; et le nombre prédéfini de fois où la série de traitements de croissance doit être répétée étant configuré pour être compris dans le nombre maximal de comptes de traitement.
(JA) プロセスチャンバのクリーニングを都度行うことなく、複数枚のシリコンウェーハに対して枚葉式のエピタキシャル成長処理を連続して行う際に、裏面クモリの発生を防止しつつ、生産性に優れたエピタキシャルシリコンウェーハの製造方法を提供する。 本発明によるエピタキシャルシリコンウェーハの製造方法は、シリコンウェーハ搬入工程と、シリコンエピタキシャル層形成工程と、前記シリコンウェーハの搬出工程と、クリーニング工程と、を含み、前記クリーニング工程を、前記搬入工程、前記シリコンエピタキシャル層形成工程および前記搬出工程による一連の成長処理を所定回数繰り返し行った前後に行い、前記搬送チャンバ内の窒素ガスの総置換回数と、前記一連の成長処理における最大処理回数との対応関係を予め求め、前記所定回数を前記最大処理回数の範囲内とする。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)