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1. (WO2018123166) WET ETCHING COMPOSITION FOR SUBSTRATE HAVING SiN LAYER AND Si LAYER AND WET ETCHING METHOD USING SAME
Latest bibliographic data on file with the International BureauSubmit observation

Pub. No.: WO/2018/123166 International Application No.: PCT/JP2017/034250
Publication Date: 05.07.2018 International Filing Date: 22.09.2017
IPC:
H01L 21/308 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30
Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
302
to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
306
Chemical or electrical treatment, e.g. electrolytic etching
308
using masks
Applicants:
三菱瓦斯化学株式会社 MITSUBISHI GAS CHEMICAL COMPANY, INC. [JP/JP]; 東京都千代田区丸の内二丁目5番2号 5-2, Marunouchi 2-chome, Chiyoda-ku, Tokyo 1008324, JP
Inventors:
堀田 明伸 HORITA Akinobu; JP
島田 憲司 SHIMADA Kenji; JP
高橋 健一 TAKAHASHI Kenichi; JP
尾家 俊行 OIE Toshiyuki; JP
伊藤 彩 ITO Aya; JP
Agent:
小林 浩 KOBAYASHI Hiroshi; JP
杉山 共永 SUGIYAMA Tomohisa; JP
田村 恭子 TAMURA Kyoko; JP
鈴木 康仁 SUZUKI Yasuhito; JP
Priority Data:
2016-25054526.12.2016JP
Title (EN) WET ETCHING COMPOSITION FOR SUBSTRATE HAVING SiN LAYER AND Si LAYER AND WET ETCHING METHOD USING SAME
(FR) COMPOSITION DE GRAVURE HUMIDE POUR SUBSTRAT AYANT UNE COUCHE DE SiN ET UNE COUCHE DE Si ET PROCÉDÉ DE GRAVURE HUMIDE L'UTILISANT
(JA) SiN層およびSi層を有する基板用ウェットエッチング組成物およびこれを用いたウェットエッチング方法
Abstract:
(EN) The present invention relates to a wet etching composition for a substrate having a SiN layer and a Si layer, containing 0.1-50 wt. % of a fluorine compound (A), 0.04-10 wt. % of an oxidizer (B), and water (D), and having a pH in the range of 2.0-5.0. The present invention also relates to a wet etching method for a semiconductor substrate having a SiN layer and a Si layer, using the wet etching composition. Using the composition according to the present invention enables an increase in the selectability of removal of Si relative to SiN in substrates having a SiN layer and a Si layer, while reducing corrosion of equipment and exhaust lines by volatile components produced during use, air pollution, and the environmental burden of the nitrogen in the composition.
(FR) La présente invention concerne une composition de gravure humide pour un substrat ayant une couche de SiN et une couche de Si, contenant 0,1 à 50 % en poids. d'un composé de fluor (A), 0,04 à 10 % en poids d'un oxydant (B), et de l'eau (D), et ayant un pH dans la plage de 2,0 à 5,0. La présente invention concerne également un procédé de gravure humide pour un substrat semiconducteur ayant une couche de SiN et une couche de Si, utilisant la composition de gravure humide. L'utilisation de la composition selon la présente invention permet une augmentation de la sélectivité de l'élimination du Si par rapport au SiN dans des substrats ayant une couche de SiN et une couche de Si, tout en réduisant la corrosion de l'équipement et des lignes d'échappement par des composants volatils produits pendant l'utilisation, la pollution de l'air et la charge environnementale de l'azote dans la composition.
(JA) 本発明は、フッ素化合物(A)を0.1~50質量%、酸化剤(B)を0.04~10質量%、および水(D)を含有し、pHが2.0~5.0の範囲にあるSiN層およびSi層を有する基板用ウェットエッチング組成物に関する。また本発明は、該ウェットエッチング組成物を用いる、SiN層およびSi層を有する半導体基板のウェットエッチング方法に関する。本発明の組成物を用いることにより、使用時に発生する揮発成分による装置や排気ラインの腐食および大気汚染、さらには組成物中の窒素分による環境負荷を軽減しながら、SiN層およびSi層を有する基板に対して、SiNに対するSiの除去選択性を高めることができる。
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Organization (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)
Also published as:
CN108513679KR1020180087420EP3389083US20190040317