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1. (WO2018123148) SILICON CARBIDE EPITAXIAL SUBSTRATE AND METHOD FOR PRODUCING SILICON CARBIDE SEMICONDUCTOR DEVICE
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Pub. No.: WO/2018/123148 International Application No.: PCT/JP2017/032220
Publication Date: 05.07.2018 International Filing Date: 07.09.2017
IPC:
H01L 21/20 (2006.01) ,C23C 16/42 (2006.01) ,H01L 21/205 (2006.01) ,H01L 21/336 (2006.01) ,H01L 29/12 (2006.01) ,H01L 29/78 (2006.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
20
Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
C CHEMISTRY; METALLURGY
23
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
C
COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
16
Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition (CVD) processes
22
characterised by the deposition of inorganic material, other than metallic material
30
Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
42
Silicides
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
20
Deposition of semiconductor materials on a substrate, e.g. epitaxial growth
205
using reduction or decomposition of a gaseous compound yielding a solid condensate, i.e. chemical deposition
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02
Manufacture or treatment of semiconductor devices or of parts thereof
04
the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18
the devices having semiconductor bodies comprising elements of the fourth group of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334
Multistep processes for the manufacture of devices of the unipolar type
335
Field-effect transistors
336
with an insulated gate
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02
Semiconductor bodies
12
characterised by the materials of which they are formed
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29
Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66
Types of semiconductor device
68
controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76
Unipolar devices
772
Field-effect transistors
78
with field effect produced by an insulated gate
Applicants:
住友電気工業株式会社 SUMITOMO ELECTRIC INDUSTRIES, LTD. [JP/JP]; 大阪府大阪市中央区北浜四丁目5番33号 5-33, Kitahama 4-chome, Chuo-ku, Osaka-shi, Osaka 5410041, JP
Inventors:
宮瀬 貴也 MIYASE, Takaya; JP
堀 勉 HORI, Tsutomu; JP
和田 圭司 WADA, Keiji; JP
伊東 洋典 ITOH, Hironori; JP
Agent:
特許業務法人深見特許事務所 FUKAMI PATENT OFFICE, P.C.; 大阪府大阪市北区中之島三丁目2番4号 中之島フェスティバルタワー・ウエスト Nakanoshima Festival Tower West, 2-4, Nakanoshima 3-chome, Kita-ku, Osaka-shi, Osaka 5300005, JP
Priority Data:
2016-25364627.12.2016JP
Title (EN) SILICON CARBIDE EPITAXIAL SUBSTRATE AND METHOD FOR PRODUCING SILICON CARBIDE SEMICONDUCTOR DEVICE
(FR) SUBSTRAT ÉPITAXIQUE AU CARBURE DE SILICIUM ET PROCÉDÉ DE PRODUCTION D’UN DISPOSITIF SEMI-CONDUCTEUR AU CARBURE DE SILICIUM
(JA) 炭化珪素エピタキシャル基板および炭化珪素半導体装置の製造方法
Abstract:
(EN) This silicon carbide epitaxial substrate comprises a silicon carbide substrate and a silicon carbide epitaxial film. The silicon carbide epitaxial film is present on the silicon carbide substrate. The polytype of the silicon carbide substrate and the silicon carbide epitaxial film is 4H. The silicon carbide epitaxial film comprises a first layer that is in contact with the silicon carbide substrate and a second layer that is on the first layer and constitutes the main surface of the silicon carbide epitaxial film. The silicon carbide substrate, the first layer and the second layer contain an n-type impurity. The concentration of the n-type impurity contained in the first layer is lower than the concentration of the n-type impurity contained in the silicon carbide substrate, but is higher than the concentration of the n-type impurity contained in the second layer. The main surface of the silicon carbide substrate has a basal plane dislocation having a first area density. The main surface of the silicon carbide epitaxial film has a basal plane dislocation having a second area density that is lower than the first area density. The value obtained by dividing the second area density by the first area density is 2/10,000 or less.
(FR) La présente invention concerne un substrat épitaxique au carbure de silicium qui comprend un substrat de carbure de silicium et une pellicule épitaxique au carbure de silicium. La pellicule épitaxique au carbure de silicium est présente sur le substrat au carbure de silicium. Le polytype du substrat au carbure de silicium et de la pellicule épitaxique au carbure de silicium est 4H. La pellicule épitaxique au carbure de silicium comprend une première couche qui est en contact avec le substrat au carbure de silicium et une deuxième couche qui est sur la première couche et qui constitue la surface principale de la pellicule épitaxique au carbure de silicium. Le substrat au carbure de silicium, la première couche et la deuxième couche contiennent une impureté de type n. La concentration de l’impureté de type n contenue dans la première couche est inférieure à la concentration de l’impureté de type n contenue dans le substrat au carbure de silicium, mais est supérieure à la concentration de l’impureté de type n contenue dans la deuxième couche. La surface principale du substrat au carbure de silicium a une dislocation de plan basal ayant une première densité d’aire. La surface principale de la pellicule épitaxique au carbure de silicium a une dislocation de plan basal ayant une deuxième densité d’aire qui est inférieure à la première densité d’aire. La valeur obtenue en divisant la deuxième densité d’aire par la première densité d’aire est inférieure ou égale à 2/10 000.
(JA) 炭化珪素エピタキシャル基板は、炭化珪素基板と、炭化珪素エピタキシャル膜とを有している。炭化珪素エピタキシャル膜は、炭化珪素基板上にある。炭化珪素基板および炭化珪素エピタキシャル膜のポリタイプは、4Hである。炭化珪素エピタキシャル膜は、炭化珪素基板に接する第1層と、第1層上にありかつ炭化珪素エピタキシャル膜の主表面を構成する第2層とを含む。炭化珪素基板と、第1層と、第2層とは、n型不純物を含む。第1層が含むn型不純物の濃度は、炭化珪素基板が含むn型不純物の濃度より低く、かつ第2層が含むn型不純物の濃度より高い。炭化珪素基板の主表面には、第1面密度を有する基底面転位がある。炭化珪素エピタキシャル膜の主表面には、第1面密度よりも低い第2面密度を有する基底面転位がある。第2面密度を、第1面密度で除した値は、2/10000以下である。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Japanese (JA)
Filing Language: Japanese (JA)