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|1. (WO2018121162) CHIP PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREFOR|
|Applicants:||HUAWEI TECHNOLOGIES CO., LTD.
|Title:||CHIP PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREFOR|
A chip packaging structure (10) comprising a substrate (104), multiple chips (101 and 102) and multiple discrete components (103) packaged on the upper surface of the substrate, and a heat-dissipating apparatus (100). The heat-dissipating apparatus comprises an insulating layer (106) and a thermally-conductive layer (107) in a laminated arrangement. The insulating layer completely covers and fits the multiple chips, the outer surfaces of the multiple discrete components, and the upper surface of the substrate, and is used for transferring heat produced by the multiple chips and the multiple discrete components to the thermally-conductive layer and the substrate, thus dissipating via the thermally-conductive layer and the substrate the heat produced by the multiple chips and the multiple discrete components. A manufacturing method for the chip packaging structure. By means of the heat-dissipating apparatus provided, the chip packaging structure is capable of implementing even and efficient heat dissipation for a system-in-package.