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1. WO2018120997 - ACTIVE ARRAY SUBSTRATE AND FABRICATION METHOD THEREFOR

Publication Number WO/2018/120997
Publication Date 05.07.2018
International Application No. PCT/CN2017/106320
International Filing Date 16.10.2017
IPC
H01L 21/77 2017.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
CPC
H01L 2021/775
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
775comprising a plurality of TFTs on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
H01L 21/28008
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
28008Making conductor-insulator-semiconductor electrodes
H01L 21/77
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
H01L 27/1237
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1214comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
1237with a different composition, shape, layout or thickness of the gate insulator in different devices
H01L 27/124
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1214comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
124with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
H01L 27/1262
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1214comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
1259Multistep manufacturing methods
1262with a particular formation, treatment or coating of the substrate
Applicants
  • 惠科股份有限公司 HKC CORPORATION LIMITED [CN]/[CN]
  • 重庆惠科金渝光电科技有限公司 CHONGQING HKC OPTOELECTRONICS TECHNOLOGY CO., LTD.
Inventors
  • 卓恩宗 CHO, En-Tsung
Agents
  • 深圳市百瑞专利商标事务所(普通合伙) SHENZHEN BAIRUI PATENT & TRADEMARK OFFICE
Priority Data
201611270692.730.12.2016CN
Publication Language Chinese (ZH)
Filing Language Chinese (ZH)
Designated States
Title
(EN) ACTIVE ARRAY SUBSTRATE AND FABRICATION METHOD THEREFOR
(FR) SUBSTRAT DE RÉSEAU ACTIF ET SON PROCÉDÉ DE FABRICATION
(ZH) 主动阵列基板及其制造方法
Abstract
(EN)
An active array substrate and a fabrication method therefor, the fabrication method comprising: providing a substrate (10); forming a gate electrode on the substrate (10); sequentially forming a gate electrode insulation layer (22), a semiconductor layer and an ohmic contact layer (24) on a transparent substrate and the gate electrode; forming a source electrode (25) and a drain electrode (26) on the ohmic contact layer (24); forming a protective layer (30) on the source electrode (25) and the drain electrode (26); forming a pixel electrode layer (50) on the protective layer (30), wherein the pixel electrode layer (50) is electrically connected to the drain electrode (26); the gate electrode insulation layer (22) comprises nano-porous silicon and nano-particles, the dielectric constant of the nano-particles being greater than the dielectric constant of the nano-porous silicon.
(FR)
L'invention concerne un substrat de réseau actif et son procédé de fabrication, le procédé de fabrication consistant à : fournir un substrat (10); former une électrode de grille sur le substrat (10); former de manière séquentielle une couche d'isolation d'électrode de grille (22), une couche semiconductrice et une couche de contact ohmique (24) sur un substrat transparent et l'électrode de grille; former une électrode de source (25) et une électrode de drain (26) sur la couche de contact ohmique (24); former une couche de protection (30) sur l'électrode de source (25) et l'électrode de drain (26); former une couche d'électrode de pixel (50) sur la couche de protection (30), la couche d'électrode de pixel (50) étant électriquement connectée à l'électrode de drain (26); la couche d'isolation d'électrode de grille (22) comprenant du silicium nano-poreux et des nanoparticules, la constante diélectrique des nanoparticules étant supérieure à la constante diélectrique du silicium nano-poreux.
(ZH)
一种主动阵列基板及其制造方法,制造方法包括:提供基板(10);形成栅极于基板(10)上;依序形成栅极绝缘层(22)、半导体层及欧姆接触层(24)于透明基材及所述栅极上;形成源电极(25)及漏电极(26)于所述欧姆接触层(24)上;形成保护层(30)于所述源电极(25)及所述漏电极(26)上;以及形成像素电极层(50)于所述保护层(30)上,其中所述像素电极层(50)是电性连接于所述漏电极(26);其中,所述栅极绝缘层(22)包括纳米多孔硅及纳米颗粒,所述纳米颗粒的介电常数大于纳米多孔硅的介电常数。
Also published as
Latest bibliographic data on file with the International Bureau