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1. (WO2018120309) ARRAY SUBSTRATE OF OLED DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
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Pub. No.: WO/2018/120309 International Application No.: PCT/CN2017/071162
Publication Date: 05.07.2018 International Filing Date: 13.01.2017
IPC:
H01L 27/12 (2006.01) ,H01L 21/77 (2017.01)
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27
Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02
including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12
the substrate being other than a semiconductor body, e.g. an insulating body
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21
Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77
Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
Applicants: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.[CN/CN]; TAN Yu No.9-2 Tangming Rd, Guangming New District Shenzhen, Guangdong 518132, CN
Inventors: JIANG, Chunsheng; CN
Agent: ESSEN PATENT&TRADEMARK AGENCY; Hailrun Complex Block A Room 1709-1711 No.6021 Shennan Blvd,Futian District ShenZhen, Guangdong 518040, CN
Priority Data:
201611262923.X30.12.2016CN
Title (EN) ARRAY SUBSTRATE OF OLED DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
(FR) SUBSTRAT DE RÉSEAU D’ÉCRAN DELO ET SON PROCÉDÉ DE FABRICATION
(ZH) OLED显示装置的阵列基板及其制作方法
Abstract:
(EN) Provided is a manufacturing method of an array substrate of an OLED display device, comprising: forming, by means of a first mask, active regions (101, 102) of a first thin film transistor T1 and a second thin film transistor T2; forming, by means of a second mask, channel doping regions (103, 104), source doping regions (105, 107), and drain doping regions (106, 108) of the T1 and T2; forming, by means of a third mask, gates (110, 111) of the T1 and T2; forming, by means of a fourth mask, vias (113, 114); and forming, by means of a fifth mask, source-drains (115, 116, 118) of the T1 and T2, a data line and a pixel electrode. The manufacturing method can reduce process steps.
(FR) L'invention concerne un procédé de fabrication d'un substrat de réseau d'un écran DELO, consistant à : former, au moyen d'un premier masque, des régions actives (101, 102) d'un premier transistor à couches minces T1 et d'un second transistor à couches minces T2 ; former, au moyen d'un deuxième masque, des régions de dopage de canal (103, 104), des régions de dopage de source (105, 107) et des régions de dopage de drain (106, 108) des T1 et T2 ; former, au moyen d'un troisième masque, des grilles (110, 111) des T1 et T2 ; former, au moyen d'un quatrième masque, des trous d'interconnexion (113, 114) ; et former, au moyen d'un cinquième masque, des drains et des sources (115, 116, 118) des T1 et T2, une ligne de données et une électrode de pixel. Le procédé de fabrication permet de réduire les étapes du procédé.
(ZH) 一种OLED显示装置的阵列基板制作方法,通过第一光罩形成第一薄膜晶体管T1与第二薄膜晶体管T2的有源区域(101,102),通过第二光罩形成T1与T2的沟道掺杂区(103,104)、源极掺杂区(105,107)及漏极掺杂区(106,108),通过第三光罩形成T1与T2栅极(110,111),通过第四光罩形成过孔(113,114),通过第五光罩形成T1与T2的源漏极(115,116,118),以及数据线及像素电极。本制作方法能够节省工序。
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: Chinese (ZH)
Filing Language: Chinese (ZH)