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1. (WO2018119866) LOW-TEMPERATURE POLYSILICON ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF

Pub. No.:    WO/2018/119866    International Application No.:    PCT/CN2016/112991
Publication Date: Fri Jul 06 01:59:59 CEST 2018 International Filing Date: Fri Dec 30 00:59:59 CET 2016
IPC: H01L 21/84
H01L 27/12
Applicants: WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
武汉华星光电技术有限公司
Inventors: GUO, Yuan
郭远
Title: LOW-TEMPERATURE POLYSILICON ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF
Abstract:
A low-temperature polysilicon array substrate and manufacturing method thereof. The method comprises: forming, sequentially and on a glass substrate, mask layers (11, 12), a buffer layer, and a U-shaped polysilicon pattern (21); performing channel doping and heavy N+ doping on the U-shaped polysilicon pattern (21) at a display region to form a gate isolation layer and etch a first through hole; and then forming a gate line (31), sources (321, 322) of an N-type double-gate transistor, and a light doping region; and performing heavy P+ doping on the U-shaped polysilicon pattern (21) at a non-display region.