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1. (WO2018107448) EXECUTING AN APPLICATION WITH MULTIPLE PROCESSORS
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/107448 International Application No.: PCT/CN2016/110253
Publication Date: 21.06.2018 International Filing Date: 16.12.2016
IPC:
G06F 9/455 (2006.01)
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
9
Arrangements for programme control, e.g. control unit
06
using stored programme, i.e. using internal store of processing equipment to receive and retain programme
44
Arrangements for executing specific programmes
455
Emulation; Software simulation
Applicants: LI, Tianyou[CN/CN]; CN (BZ)
XU, Shu[CN/CN]; CN (BZ)
REN, Jinkui[CN/CN]; CN (BZ)
JIANG, Zidong[CN/CN]; CN (BZ)
LIN, Weiliang[CN/CN]; CN (BZ)
ZHU, Chaobo[CN/CN]; CN (BZ)
HU, Yong[CN/CN]; CN (BZ)
INTEL CORPORATION[US/US]; 2200 Mission College Boulevard Santa Clara, California 95054, US
Inventors: LI, Tianyou; CN
XU, Shu; CN
REN, Jinkui; CN
JIANG, Zidong; CN
LIN, Weiliang; CN
ZHU, Chaobo; CN
HU, Yong; CN
Agent: CHINA PATENT AGENT (H.K.) LTD.; 22/F., Great Eagle Center 23 Harbour Road Wanchai Hong Kong, CN
Priority Data:
Title (EN) EXECUTING AN APPLICATION WITH MULTIPLE PROCESSORS
(FR) EXÉCUTION D'APPLICATION AVEC DE MULTIPLES PROCESSEURS
Abstract:
(EN) In one example, a system for executing applications can include a main processor to initialize a virtual machine to execute an application. The main processor can also determine a main utilization indicator of the main processor is above a threshold and an auxiliary utilization indicator of an auxiliary processor is below a threshold, wherein the auxiliary processor is based on an auxiliary instruction set architecture. Additionally, the main processor can transmit an instruction from the application to the auxiliary processor for execution and update context data for the application in response to receiving an execution result from the auxiliary processor.
(FR) Selon un exemple de l'invention, un système d'exécution d'applications peut comprendre un processeur principal pour initialiser une machine virtuelle pour exécuter une application. Le processeur principal peut aussi déterminer si un indicateur d'utilisation principal du processeur principal est supérieur à un seuil et si un indicateur d'utilisation auxiliaire d'un processeur auxiliaire est inférieur à un seuil, le processeur auxiliaire étant basé sur une architecture d'ensemble d'instructions auxiliaire. De plus, le processeur principal peut transmettre une instruction de l'application au processeur auxiliaire pour l'exécution et mettre à jour des données de contexte pour l'application en réponse à la réception d'un résultat d'exécution provenant du processeur auxiliaire.
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Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)