Some content of this application is unavailable at the moment.
If this situation persist, please contact us atFeedback&Contact
1. (WO2018106942) SUPERCONDUCTING PRINTED CIRCUIT BOARD RELATED SYSTEMS, METHODS, AND APPARATUS
Latest bibliographic data on file with the International Bureau    Submit observation

Pub. No.: WO/2018/106942 International Application No.: PCT/US2017/065152
Publication Date: 14.06.2018 International Filing Date: 07.12.2017
IPC:
H05K 3/42 (2006.01) ,H01L 39/14 (2006.01) ,H05K 1/09 (2006.01) ,H05K 1/11 (2006.01)
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3
Apparatus or processes for manufacturing printed circuits
40
Forming printed elements for providing electric connections to or between printed circuits
42
Plated through-holes
H ELECTRICITY
01
BASIC ELECTRIC ELEMENTS
L
SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
39
Devices using superconductivity or hyperconductivity; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
14
Permanent superconductor devices
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1
Printed circuits
02
Details
09
Use of materials for the metallic pattern
H ELECTRICITY
05
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
K
PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1
Printed circuits
02
Details
11
Printed elements for providing electric connections to or between printed circuits
Applicants:
D-WAVE SYSTEMS INC. [CA/CA]; 3033 Beta Avenue Burnaby, British Columbia V5G 4M9, CA
D-WAVE COMMERCIAL INC. [US/US]; 2650 E Bayshore Road Palo Alto, California 94303, US (VC)
Inventors:
NEUFELD, Richard, D.; CA
Agent:
ABRAMONTE, Frank; US
OBEIDAT, Baha, A.; US
KUMABE, Blake, K.; US
SOLTANI, Bobby, B.; US
SARGEANT, Brooke; US
QUIST, Brooke, W.; US
ROTH, Carol, J.; US
EIDT, Chandra, E.; US
O'BRIEN, Daniel; US
CARLSON, David, V.; US
STARK, Duncan; US
TARLETON, E., Russell; US
SUN, Eileen, S.; US
HARWOOD, Eric, A.; US
HAN, Hai; US
TALBERT, Hayley, J.; US
CARTER, James, J.; US
WHITE, James, A. D.; US
BARRETT, Jared, M.; US
PEPE, Jeffrey, C.; US
DANLEY, Jeffrey, E.; US
SAKOI, Jeffrey, M.; US
BAUNACH, Jeremiah, J.; US
KARLEN, John, R.; US
MORGAN, John, A.; US
WAKELEY, John, J.; US
COE, Justin, E.; US
HENCKEL, Karen, M.; US
HEFTER, Karl, A.; US
HERMANNS, Karl, R.; US
MORGAN, Kevan, L.; US
COSTANZA, Kevin, S.; US
LINFORD, Lorraine; US
COOPER, Michael, P.; US
RUSYN, Paul; US
LIN, Qing; US
HALLER, Rachel, A.; US
IANNUCCI, Robert; US
KOVELMAN, Robert, L.; US
WEBB, Samuel, E.; US
LEEK, Shoko, I.; US
ROSENMAN, Stephen, J.; US
ABEDI, Syed; US
SATAGAJ, Thomas, J.; US
BOLLER, Timothy, L.; US
LIGON, Toby, J.; US
FERRON, William, O., Jr.; US
Priority Data:
62/431,33307.12.2016US
Title (EN) SUPERCONDUCTING PRINTED CIRCUIT BOARD RELATED SYSTEMS, METHODS, AND APPARATUS
(FR) SYSTÈMES, PROCÉDÉS ET APPAREIL ASSOCIÉS À UNE CARTE DE CIRCUIT IMPRIMÉ SUPRACONDUCTRICE
Abstract:
(EN) A multilayer circuit board structure includes superconducting connections to internal layers thereof, for example by inclusion of superconducting vias. Two or more panels can each comprise respective electrically insulative substrates, each have one or more through-holes, and also include a respective bimetal foil on at least a portion of a respective surface thereof, which is patterned to form traces. The bimetal foil includes a first metal that is non-superconductive in a first temperature range and a second metal that is superconductive in the first temperature range. The panels are plated to deposit a third metal on exposed traces of the second metal, the third metal superconductive in the first temperature range. Panels are join (e.g., laminated) to form at least a three-layer superconducting printed circuit board with an inner layer, two outer layers, and superconducting vias between the inner layer and at least one of the two outer layers.
(FR) Une structure de carte de circuit imprimé multicouche comprend des connexions supraconductrices à des couches internes de celle-ci, par exemple par inclusion de trous d'interconnexion supraconducteurs. Au moins deux panneaux peuvent chacun comprendre des substrats électriquement isolants respectifs, chacun ayant un ou plusieurs trous traversants, et comprendre également une feuille bimétallique respective sur au moins une partie d'une surface respective de ceux-ci, sur laquelle sont formés des motifs pour former des traces. La feuille bimétallique comprend un premier métal qui n'est pas supraconducteur dans une première plage de température et un deuxième métal qui est supraconducteur dans la première plage de température. Les panneaux sont plaqués pour déposer un troisième métal sur les traces exposées du deuxième métal, le troisième métal étant supraconducteur dans la première plage de température. Des panneaux sont joints (par exemple, stratifiés) pour former au moins une carte de circuit imprimé supraconductrice à trois couches ayant une couche interne, deux couches externes, et des trous d'interconnexion supraconducteurs entre la couche interne et au moins l'une des deux couches externes.
front page image
Designated States: AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BG, BH, BN, BR, BW, BY, BZ, CA, CH, CL, CN, CO, CR, CU, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, GB, GD, GE, GH, GM, GT, HN, HR, HU, ID, IL, IN, IR, IS, JO, JP, KE, KG, KH, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LU, LY, MA, MD, ME, MG, MK, MN, MW, MX, MY, MZ, NA, NG, NI, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SK, SL, SM, ST, SV, SY, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, ZA, ZM, ZW
African Regional Intellectual Property Organization (ARIPO) (BW, GH, GM, KE, LR, LS, MW, MZ, NA, RW, SD, SL, ST, SZ, TZ, UG, ZM, ZW)
Eurasian Patent Office (AM, AZ, BY, KG, KZ, RU, TJ, TM)
European Patent Office (EPO) (AL, AT, BE, BG, CH, CY, CZ, DE, DK, EE, ES, FI, FR, GB, GR, HR, HU, IE, IS, IT, LT, LU, LV, MC, MK, MT, NL, NO, PL, PT, RO, RS, SE, SI, SK, SM, TR)
African Intellectual Property Organization (BF, BJ, CF, CG, CI, CM, GA, GN, GQ, GW, KM, ML, MR, NE, SN, TD, TG)
Publication Language: English (EN)
Filing Language: English (EN)